ARM introduces peripheral library

ARM introduces peripheral library
By Peter Clarke, EE Times
May 17, 1999 (2:57 p.m. EST)
URL: http://www.eetimes.com/story/OEG19990517S0024

CAMBRIDGE, England — ARM Ltd. has announced a library of peripheral components that move the company beyond its historic RISC-core domain, along with a new spin of its Amba bus that makes it possible to create wider, faster on-chip buses to link peripherals to future ARM 32-bit RISC processor cores.

The PrimeCell peripherals, available for licensing to OEM customers and semiconductor partners, provide "a fully verified and reusable set of synthesizable IP [intellectual-property cores] for assembling complete system-on-chip designs," said Chris Jones, system-on-chip product marketing manager at ARM (Cambridge, England). The revision of ARM's Advanced Microcontroller Bus Architecture (Amba), meanwhile, "provides the digital glue that binds IP cores together," he said.

"Silicon is becoming the new backplane for systems integration and is set to replace the printed-circuit board as the dominant interconnect environment," said Jones.

Jones said the company sees Amba 2.0 as "a significant improvement" that will "enable designers to extract new levels of system performance. We have worked with a number of semiconductor partners on this. ARM10 and all future ARM processor cores will be based on [it]."

ARM's revision to its on-chip bus comes a few days after IBM Corp. and Motorola Inc. separately announced they were standardizing internally on different on-chip buses and would be encouraging third parties to design peripherals to interface with them by putting details of the buses in the public domain. IBM's on-chip bus is called CoreConnect; Motorola's is IP-bus.

Extensive bus route

Jones emphasized that the Amba bus has been subject to a royalty-free license since its introduction in 1995. "Twenty-two ARM semiconductor partners are already using Amba," he said. "The majority of ARM-based designs are based on Amba."

The PrimeCell introduction, meanwhile, puts ARM in the position of licensing a variety of reusable cores for functions outside the 32-bit RISC core field that it helped pioneer.

The initial set of PrimeCell cores include a UART, synchronous-DRAM controller, synchronous serial interface, real-time clock, audio codec interface, general-purpose I/O cells, smart-card interface and advanced color LCD controller. Jones said additional PrimeCell peripherals will be added to the library to meet customer needs, but he declined to speculate on the nature or complexity of future introductions. Per-use pricing for the general-purpose PrimeCell peripherals starts at $5,000 and varies according to their complexity.

All the PrimeCell cores are compatible with the revamped Amba specification, which still consists of two linked buses: a system bus and a peripherals bus. The system bus connects the embedded processor to high-performance peripherals, on-chip memory and interface functions, and supports multimaster bus management.

General-purpose peripherals re side on the Advanced Peripheral Bus with connection to the system bus via a bridge.

Clock-signal change

The Amba 2.0 specification includes a change of clock-signaling protocol to a single active rising edge that ARM says is compatible with commonly used logic-synthesis software, such as Design Compiler from Synopsys Inc. (Mountain View, Calif.).

"Design Compiler is the dominant synthesis tool in use today and it has been optimized for systems that use a single rising edge. That's one reason we've moved Amba toward that system," Jones said. Changes in Amba 2.0 also aid static timing analysis and test insertion, he said.

Amba 2.0 adds an Advanced High Performance Bus (AHB ) that offers data-bus widths of 32, 64 and 128 bits, extendable to 1,024 bits for high-bandwidth, data-intensive applications using wide on-chip memory.

"Upgrading to AHB delivers a 30 percent to 50 percent increase in bus clock rate and data throughput compared with the Advanced System Bus at a given process and voltage node," said John Cornish, director of European marketing at ARM. The Advanced System Bus (ASB) is the equivalent of the AHB in the previous Amba spec but was restricted to a maximum 32-bit bus width.

Jones said adapting existing Amba peripherals to the new specification was relatively easy. He said ARM would provide "a wrapper" — a piece of additional interface logic — to allow previously developed ASB slave functions to work with the upgrade to the AHB.

The Amba 2.0 on-chip bus specification is available free through ARM's Web site.