NEC aims EDA, packaging initiatives at system-chip market

NEC aims EDA, packaging initiatives at system-chip market
By Craig Matsumoto, EE Times
May 5, 1999 (5:24 p.m. EST)
URL: http://www.eetimes.com/story/OEG19990505S0012

SAN JOSE, Calif. — NEC Electronics Inc. outlined new initiatives targeted at the system-on-a-chip (SoC) market on Tuesday (May 4), including partnerships in packaging technologies and an EDA framework that aims to guarantee register-transfer level (RTL) sign-off on designs.

Along with restructurings that began at NEC Corp. (Tokyo) in December, both initiatives are intended to help the company continue its adjustment from a closed environment to the network of partnerships required for the system-on-a-chip realm, said Hirokazu Hashimoto, president of NEC Electronics (Santa Clara, Calif.).

NEC Electronics intends to leverage the systems expertise of its parent company's other divisions, Hashimoto said, because that expertise can set NEC apart from other ASIC suppliers, such as LSI Logic Corp.

NEC's first new initiative, dubbed ACE-2, is a program aimed at EDA tools. Targeting RTL sign-off as a required step for successful system-level i ntegration, NEC is setting a goal to be able to process a 30-million-gate design, from system-design specs to complete EDA sign-off, in three months' time, Hashimoto said.

Hashimoto stressed that this is different from "silicon sign-off," the production of a successful prototype, because it takes into account the timing verification of the design. Simple silicon sign-off often results in a chip with unacceptable timing, which requires a second pass through the design process, he said.

NEC is laying out a budget of $30 million during the next three years to reach that three-month design goal.

Key to this initiative is OpenCAD, NEC's ongoing project to adopt third-party EDA tools and industry-standard design interfaces. "Depending on the system application or segment, we will have different design tool sets," Hashimoto said.

NEC's other new initiative involves finding partners to develop chip packages. Because packaging has become such a critical factor for high-performance chips — partic ularly as pin counts climb to the 2,000 level for 0.18- and 0.15-micron chips — NEC officials want to create partnerships to develop packaging for U.S.-based customers. Likely candidates include the U.S. arms of Japanese companies such as Kyocera, as well as U.S.-based companies that Hashimoto declined to name.

NEC began those moves in December with the creation of NEC Electronics' system integration group. In addition, parent NEC Corp. on April 1 reorganized its semiconductor group with an eye on systems integration, creating divisions for system-on-a-chip implementation and silicon intellectual property (IP) library development, among others.

Aside from system-on-a-chip solutions, Hashimoto said it's also important for NEC to present discrete options. Too many people leap into system-level integration without considering whether such a move is wise, Hashimoto said.

"People, without clearly thinking about architecture changes, simply include embedded DRAM. This automatically increases cost ," he said. Likewise, "when we include CPUs without a clear definition [of the purpose], this is not good for time-to-market," as the difficulties of CPU integration might lead to several design iterations, he said.

Separately, Hashimoto said NEC also would like to include FPGA cores in its system-on-a-chip plans. Licensed from outside companies, those cores could be used inside prototype chips to speed the development process, then replaced with the appropriate ASIC elements later.

"NEC does not have a plan to enter the FPGA market, but NEC does have a plan to include programmable logic inside an SoC," he said. Its use would definitely address the time-to-market emphasis of most designs, as an FPGA core could help designers work on the chip's software earlier in the design, he said. But once the prototyping stage is complete, Hashimoto sees the programmable piece being replaced by custom-logic circuitry, to keep down the price of the overall chip.

NEC previously licensed its FPGA technology from now-defunct Crosspoint Solutions Inc. Possibilities for a future FPGA partner could include Lucent Technologies Inc., which has worked closely with NEC for years, Hashimoto said.