English
XMOS puts multi-core in mass market for under US$ 5 per core
Launches 2nd Generation XS1-L family of event-driven processors™
Sunnyvale, California and Bristol, UK -- June 24, 2009 -- XMOS has today launched its 2nd generation of event-driven processors, the XS1-L series, targeted at the mass electronics market with a sub $5 price point. The XS1-L family provides embedded software developers with an energy-efficient, scalable, multi-core solution which enables them to build complete systems combining interface, DSP and control functions entirely in software.
Built on a 65-nanometer process, the XS1-L1 is sampling with customers now. It is available in easy-to-use packages and any number of devices can easily be linked together with XMOS links, scaling to larger systems, as required. The dual-core XS1-L2 will sample in Q3 2009.
XMOS CEO, James Foster, said: “In the mass electronics market, the agility and speed delivered by XS1-L devices are important. It is widely recognized that developers are dissatisfied with the high NREs and 6 month turn-around associated with the ASICs they are currently using. Implementing complete systems with FPGAs is just not cost-effective. Developers are crying out for a programmable solution at the right price point. XMOS event-driven processors meet this market need, providing rapid programmability in C together with tools that are easy to use.”
Foster continued: “The launch of the XS1-L marks XMOS’ emergence as a major player in the global consumer electronics market. We already have over 400 customers and demand for the XS1-L is strong especially in audio DSP, USB peripherals, networked LED displays and robotics.”
Each XS1-L XCore™ contains a 32-bit processor and operates up to 400MIPS. XCore power consumption is below 500µW in sleep mode and 20mW in standby with active power adding under 450µW/MHz. The event-driven architecture, together with XMOS' development tools enables XCores to switch automatically between standby and active saving up to 90% of energy in low duty-cycle applications - no special programming is needed.
XS1-L devices are supported by tools available free of charge from the XMOS website. Because XMOS devices are programmed using high-level languages, existing reference designs based on the XS1-G can be migrated to the XS1-L by simply recompiling the software.
A new development kit, the XC-5, based on the XS1-L1 is also available.
Pricing and Availability
The XS1-L1 device is currently available in a 10x10 LQFP64 package (samples available now) and a 14x14 TQFP128 package (samples available in July) both priced under $5 for 10k unit quantities.
Sunnyvale, California and Bristol, UK -- June 24, 2009 -- XMOS has today launched its 2nd generation of event-driven processors, the XS1-L series, targeted at the mass electronics market with a sub $5 price point. The XS1-L family provides embedded software developers with an energy-efficient, scalable, multi-core solution which enables them to build complete systems combining interface, DSP and control functions entirely in software.
Built on a 65-nanometer process, the XS1-L1 is sampling with customers now. It is available in easy-to-use packages and any number of devices can easily be linked together with XMOS links, scaling to larger systems, as required. The dual-core XS1-L2 will sample in Q3 2009.
XMOS CEO, James Foster, said: “In the mass electronics market, the agility and speed delivered by XS1-L devices are important. It is widely recognized that developers are dissatisfied with the high NREs and 6 month turn-around associated with the ASICs they are currently using. Implementing complete systems with FPGAs is just not cost-effective. Developers are crying out for a programmable solution at the right price point. XMOS event-driven processors meet this market need, providing rapid programmability in C together with tools that are easy to use.”
Foster continued: “The launch of the XS1-L marks XMOS’ emergence as a major player in the global consumer electronics market. We already have over 400 customers and demand for the XS1-L is strong especially in audio DSP, USB peripherals, networked LED displays and robotics.”
Each XS1-L XCore™ contains a 32-bit processor and operates up to 400MIPS. XCore power consumption is below 500µW in sleep mode and 20mW in standby with active power adding under 450µW/MHz. The event-driven architecture, together with XMOS' development tools enables XCores to switch automatically between standby and active saving up to 90% of energy in low duty-cycle applications - no special programming is needed.
XS1-L devices are supported by tools available free of charge from the XMOS website. Because XMOS devices are programmed using high-level languages, existing reference designs based on the XS1-G can be migrated to the XS1-L by simply recompiling the software.
A new development kit, the XC-5, based on the XS1-L1 is also available.
Pricing and Availability
The XS1-L1 device is currently available in a 10x10 LQFP64 package (samples available now) and a 14x14 TQFP128 package (samples available in July) both priced under $5 for 10k unit quantities.
|
||||||
Related News
- Multicore Microcontrollers Enable Gigabit Ethernet Internet of Things for Under $5
- Apple to Start Mass Producing Self-Designed Mac SoC, Projected to Cost under US$100, in 1H21, Says TrendForce
- Faraday Reports Fourth Quarter 2020 Revenues at NT$1,430 Million, 2020 Annual Revenues NT$5,495 Million, Mass Production Up 18% YoY
- Imagination announces PowerVR Series3NX Neural Network Accelerator, bringing multi-core scalability to the embedded AI market
- Worldwide Semiconductor Market reported to be US$336 billion in 2014, up 9.9% from 2013.
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
|
E-mail This Article | 
|
|
Printer-Friendly Page |