English
USB2.0 OTG PHY supporting UTMI+ level 3 interface - 28HK/55LL
nSys Demonstrates Verification IP for PCIe 3.0 at the PCI-SIG DevCon 2009
Newark -- July 15, 2009 -- nSys Design Systems will demonstrate Verification IP for PCIe® 3.0, which is currently at preliminary revision 0.5, at the PCI-SIG® DevCon 2009, to be held in Santa Clara, CA on July 15-16, 2009.
“In our endeavor to take PCI to the next generation, we have consistently relied upon PCI-SIG member companies including nSys as part of the PCIe ecosystem,” said Al Yanes, chairman and president, PCI-SIG. “nSys has been actively sponsoring PCI-SIG developers conferences around the world for more than five years now and we appreciate their willingness to share their experiences and expertise by presenting papers that benefit other members.”
“nSys has a comprehensive Verification IP for PCIe 2.0/ 1.0, in native Verilog and SystemVerilog,” said Atul Bhatia, CEO, nSys Design Systems. “As PCIe 3.0 is still evolving, it is our endeavor as an observer of the protocol working group, to make available the interim solutions for Verification IP to industry leaders.”
About nSys
nSys leverages the world’s largest portfolio of Verification IPs it has developed, to provide products & services to Accelerate Designs for its customers developing ASIC, FPGA or IP. The nVS family has proven Verification IPs in SystemVerilog and Verilog for standard interfaces/protocols such as PCI Express, SATA, SAS, AXI, AHB, APB, USB 2.0, SuperSpeed USB 3.0, DDR2, DDR3, Ethernet etc. For more information, please visit nSys online at www.nsysinc.com
About PCI-SIG
The PCI Special Interest Group (PCI-SIG) actively promotes PCI technology through a series of events. Members can test products at compliance workshops, receive PCI training at technical update seminars, participate in industry education and aid in promoting PCI technology at select tradeshows. For further information visit www.pcisig.com
“In our endeavor to take PCI to the next generation, we have consistently relied upon PCI-SIG member companies including nSys as part of the PCIe ecosystem,” said Al Yanes, chairman and president, PCI-SIG. “nSys has been actively sponsoring PCI-SIG developers conferences around the world for more than five years now and we appreciate their willingness to share their experiences and expertise by presenting papers that benefit other members.”
“nSys has a comprehensive Verification IP for PCIe 2.0/ 1.0, in native Verilog and SystemVerilog,” said Atul Bhatia, CEO, nSys Design Systems. “As PCIe 3.0 is still evolving, it is our endeavor as an observer of the protocol working group, to make available the interim solutions for Verification IP to industry leaders.”
About nSys
nSys leverages the world’s largest portfolio of Verification IPs it has developed, to provide products & services to Accelerate Designs for its customers developing ASIC, FPGA or IP. The nVS family has proven Verification IPs in SystemVerilog and Verilog for standard interfaces/protocols such as PCI Express, SATA, SAS, AXI, AHB, APB, USB 2.0, SuperSpeed USB 3.0, DDR2, DDR3, Ethernet etc. For more information, please visit nSys online at www.nsysinc.com
About PCI-SIG
The PCI Special Interest Group (PCI-SIG) actively promotes PCI technology through a series of events. Members can test products at compliance workshops, receive PCI training at technical update seminars, participate in industry education and aid in promoting PCI technology at select tradeshows. For further information visit www.pcisig.com
|
||||||
Related News
- Mobiveil's GPEX PCI Express 3.0 IP Passes PCI-SIG PCIe 3.0 Compliance Testing
- PLDA's XpressRICH3-AXI PCI Express 3.0 IP with AMBA AXI Support Passes PCI-SIG PCIe 3.0 Compliance Testing
- PLDA's XpressRICH3 PCI Express 3.0 IP Passes PCI-SIG PCIe 3.0 Compliance Testing
- Northwest Logic's PCI Express 3.0 Solution passes PCI-SIG PCIe 3.0 Compliance Testing at First Official PCIe 3.0 Compliance Workshop
- Synopsys DesignWare IP for PCI Express 3.0 Passes First PCI-SIG PCIe 3.0 Compliance Workshop
Breaking News
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- Sondrel announces CEO transition to lead next phase of growth
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
Most Popular
- Arm's power play will backfire
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
|
E-mail This Article | 
|
|
Printer-Friendly Page |