Japan urged to address system-on-a-chip, IP issues

Japan urged to address system-on-a-chip, IP issues
By Anthony Cataldo, EE Times
March 11, 1999 (2:25 p.m. EST)
URL: http://www.eetimes.com/story/OEG19990311S0009

KYOTO, Japan — As industry and research groups in the United States and Europe work to hammer out issues related to system-on-chip design, Japanese companies risk falling behind if they don't soon start to study design methodologies and open the way for intellectual property (IP) trading, according to Taro Okabe, executive researcher at one of Japan's overarching semiconductor industry research groups.

"One of the problem areas is in the design area," said Okabe, acting executive director of the Semiconductor Industry Research Institute of Japan (SIRIJ), to a recent gathering of researchers at the International Forum on Semiconductor Technology here. "In the gigabit-transistor era, we have to put huge systems on a chip and have to handle IP-like components. It's very difficult, and so far we have not found a solution in Japan."

Despite widespread recognition that the design of chips with more than a million gates will require new methodolo gies and business models, Japanese companies and the clutch of industry research groups that serve them haven't yet taken an industry-wide stance to either formulate a platform for high-level system design or to trade IP cores. That's unfortunate, Okabe said, because Japan's large IC companies each have tightly linked their chip design methodologies and manufacturing processes, and that scenario could soon work against them.

"We have not emphasized having a system in place in Japan to assure easier distribution of IP," Okabe said. "There are many big integrated device manufacturers and they have different design methodologies and process technologies. In the past, these were the strong points in Japan, but now I'm afraid it will prevent the easy distribution of IP."

Though many of these issues are the subject of research and standards groups abroad, particularly in the United States, Okabe said Japan needs its own system for its own unique needs. Japanese companies are more focused on consumer electr onics, for example, while their U.S. counterparts are focused on the PC.

"U.S. companies are concerned with PCs and PC peripherals, while many Japanese manufacturers are looking to go in a different direction like smart TVs," Okabe said. "For such a purpose we don't need a heavy MPU, but instead smaller, lighter MPUs. Cost is a big issue."

Design issues won't vary much at lower levels of the design flow, but Japan's consumer-oriented IC companies may need to come up with high-level tools above the register-transfer level (RTL), Okabe said.

"Design at the lower level may be the same, but system-level design may be different," he said. "At this moment there is no system-level CAD tool for this, and maybe in five years we will need such a design tool."

Okabe said the system methodology research program he has in mind would be similar to one created last year by the Semiconductor Industry Association in the United States, called the Focus Center Research Program. Funded by the SIA, SEMI/Sematech and the Defense Advanced Research Projects Agency (Darpa), the research group is chartered to come up with a 12-year outlook on design methodologies, architectures, EDA tools, manufacturing materials and processes. The program is being administered by the Microelectronics Advanced Research Corp. (Marco), a new subsidiary of the Semiconductor Research Corp.

As for intellectual property, Okabe said Japanese IC firms must act quickly to build an inter-company network that would allow them to buy and sell reusable cores. If they fail to act, Japanese companies will have to live by whatever standard becomes the industry norm, whether they agree with it or not.

"We should do something, and we should do it quickly," Okabe said. "Otherwise some kind of de facto standard will be in the market. Big Japanese companies already have a lot of designs that can be reused if they do this smartly."

Japan's IC companies in the last few years have been refashioning themselves as system-on-a-chip design and manufactu ring companies. In the process, they've reorganized their design teams, adopted new design methodologies, created internal databases of reusable cores and dispatched teams in Silicon Valley to do business with IP startups.

But while they're open to trading their IP to form strategic relationships with other large companies, they still harbor deep reservations about selling IP as a commodity. For one, they are fiercely competitive with one another, especially in today's sluggish domestic consumer electronics market. Few will sell away a key component to a company that could try to outbid them for a socket. Secondly, sales revenues from IP would be miniscule compared to selling silicon in huge quantities, and many companies aren't willing to pay for engineering support teams simply sell the IP.

Okabe acknowledged he's had little success rallying Japan's big IC companies to support his ideas during preliminary discussions over the last year, much less convince them to help pay for the research projects. Nevertheless, he's prepared to draft separate proposals for a Japanese-style system-level design methodology and IP distribution method.

Though this is new turf for SIRIJ, the standards body has a good track record getting regional R&D projects off the ground. Founded in 1994, it has been instrumental in the formation of groups like Super-advanced Electronics Technologies (Star), Japan's version of Sematech, and of Selete, a 300-millimeter wafer standards group. In 1998, SIRIJ helped persuade IC companies in Japan to work on their own semiconductor technology road map, akin to the SIA's oft-cited book of technology predictions for U.S. chip makers.

"My idea is to start these projects by the year 2000. This year, I hope to start some of the preliminary work," Okabe said. "IP distribution is very urgent problem, I feel, and we have to do something in a year or two."