The TSMC Tsunami at DAC 2009
edadesignline.com (July 28, 2009)
In a well-orchestrated and clearly scripted show of force, the CEOs of the three "largest" companies in EDA appeared together under the Big Top at the 2009 Design Automation Conference in San Francisco on Monday, July 27th, for a highly touted afternoon keynote panel purportedly addressing "Futures for EDA."
There was only one problem with the event: The CEO of the single largest company in EDA was not actually there. Given that TSMC is listed more than any other company on the roster of exhibitors at DAC 2009, 13 different times, TSMC CEO Morris Chang should, in fact, have been seated on stage, side-by-side with Synopsys CEO Aart de Geus, Mentor Graphics CEO Wally Rhines, and Cadence CEO Lip-Bu Tan.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related News
- EDA toolset parade at TSMC's U.S. design symposium
- TSMC's 3-nm Push Faces Tool Struggles
- Synopsys and TSMC Collaborate to Jumpstart Designs on TSMC's N2 Process with Optimized EDA Flows
- Synopsys Advances Designs on TSMC N3E Process with Production-Proven EDA Flows and Broadest IP Portfolio for AI, Mobile and HPC Applications
- Omni Design Announces Silicon Validated Gigasample+ Low Power ADC and DAC on TSMC 28nm Technology
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset