Arteris Introduces P-NoC to Address SoC Peripheral Interconnect Requirements

Expansion of Pioneering NoC Technology Enables Efficient Integration of Peripheral Component IP with Core On-Chip Communications to Improve SoC Productivity and Margins

SAN JOSE, Calif.--August 03, 2009 --Arteris Inc., the leading Network-on-Chip (NoC) SoC interconnect solutions provider, today announced availability of the P-NoC™ peripheral interconnect solution, which provides an efficient way to integrate peripheral components into a System-on-Chip. The P-NoC interconnect product is optimized for connectivity of peripheral IP cores such as timers, USB, infrared interfaces, control communications, audio, touch screen, and other functions. It can also be used to communicate to the programming interfaces of all IP cores in an SoC.

The Arteris P-NoC solution is optimized specifically to address the challenge of integrating peripherals in high-traffic SoCs while using minimal number of wires and gates. Typically, in a design with multiple peripheral functions, designers must deal with the problem of having only a few data traffic initiators communicating with many data traffic targets. The Arteris P-NoC is scalable from a few to several hundred peripherals while conserving power, reducing gates needed for peripheral communications and minimizing the number of global wires.

The Arteris P-NoC is supported by a full suite of Arteris NoC generation and verification tools for accelerated design turnaround. Arteris NoCcompilerTM, allows rapid configuration of the peripheral interconnect and generation of Verilog, VHDL and SystemC representations. Arteris NoCverifierTM supports automated verification of the peripheral interconnect.

“Today’s complex SoCs require a wide variety and breadth of functionality, and even the simplest of functions must be seamlessly integrated with the on-chip network. Arteris P-NoC saves SoC engineering time by offering a high performance, yet low cost, peripheral interconnect solution. It is supported by a silicon-proven NoC Element IP library and a full suite of design and verification tools that is fully compatible with industry standard IP interfaces,” said K. Charles Janac, President and CEO of Arteris. “Together with the Arteris NoC Solution, the Arteris P-NoC allows our suite of capabilities to address all requirements for SoC interconnect including, top level interconnect, block level interconnect, peripheral interconnect and interchip links.”

The Arteris P-NoC is available for immediate delivery.

About Arteris

Arteris, Inc. provides Network-on-Chip (NoC) interconnect IP, NoC Generation and verification tools to improve performance of system-on-chip (SoC) architectures for multimedia, mobile, telecom, and other applications. Arteris' NoC solution allows chip developers to implement scalable, efficient and high-performance SoC designs, overcoming limitations of traditional layered or pipelined bus-based architectures. Results obtained by using Arteris NoC Solution include lower power, higher performance, lower risk of development and faster delivery of complex SoCs while increasing profits.

Founded by networking experts, Arteris operates globally with headquarters in San Jose, California, and an engineering center in Paris, France. Arteris is a private company backed by a group of international investors including TVM Capital, Crescendo Ventures, Ventech, Synopsys and DoCoMo Capital. More information can be found at http://www.arteris.com.