NVM OTP NeoBit in GLOBALFOUNDRIES (350nm, 250nm, 180nm, 160nm, 150nm, 130nm, 110nm, 65nm, 55nm)
Conference set to confront 'the reality' of silicon IP
![]() |
Conference set to confront 'the reality' of silicon IP
By Richard Goering, EE Times
February 8, 1999 (11:16 a.m. EST)
URL: http://www.eetimes.com/story/OEG19990208S0008
Anyone involved with silicon intellectual property (IP) will likely find something of interest at IP99, the System-on-Chip Conference and Exhibition, scheduled for March 22-24 in Santa Clara, Calif.
The conference, now going into its third year, has been organized by Miller Freeman UK Ltd. and is co-sponsored by EE Times, which helped with program development.
This year's conference focuses on "the reality of IP" and provides both a business and a technical update of design reuse. The first day's sessions, emphasizing legal and business issues, will be geared toward chief executive officers, venture capitalists and investors. Six half-hour sessions will be followed by a cocktail hour and dinner panel, to be moderated by Robert Chaplinsky, a venture capitalist with Mohr Davidow Ventures.
Day two, March 23, will bri ng in a technical focus.
It's aimed at chief technical officers, corporate CAD managers, design engineers and project managers. Scheduled keynote speakers include Aart de Geus, chief executive officer of Synopsys Inc., and John Bourgoin, chief executive officer of MIPS Technologies Inc. The speeches will be followed by tracks on design reuse, test and functional verification, commercial and business issues, and implementation. A lunch panel will ask, "Does IP have a value?"
Day three will add two more keynote speakers: Bob Terwilliger, president and chief executive officer of ARC Cores Ltd., and Jim Ballingall, vice president of worldwide marketing for UMC Group. Tracks will include reuse and verification, codesign, integration, configurable IP and quality. A lunchtime panel will probe the question of open standards for IP.
The conference also will feature exhibits by intellectual-property providers at "IP Alley." For further information and registration, see www.ip99.com.
Related News
- 'Second-gen' silicon virtual prototyping tools set to bow
- GUC Announces Successful Launch of Industry's First 32G UCIe Silicon on TSMC 3nm and CoWoS Technology
- Marvell Demonstrates Industry's Leading 2nm Silicon for Accelerated Infrastructure
- Marvell Demonstrates Industry's Leading 2nm Silicon for Accelerated Infrastructure
- Siemens' Tessent In-System Test software enables advanced, deterministic testing throughout the silicon lifecycle
Breaking News
- intoPIX Powers Ikegami's New IPX-100 with JPEG XS for Seamless & Low-Latency IP Production
- Tower Semiconductor and Alcyon Photonics Announce Collaboration to Accelerate Integrated Photonics Innovation
- Qualcomm initiates global anti-trust complaint about Arm
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- SiliconIntervention Announces Availability of Silicon Based Fractal-D Audio Amplifier Evaluation Board
Most Popular
- Qualcomm initiates global anti-trust complaint about Arm
- Siemens acquires Altair to create most complete AI-powered portfolio of industrial software
- Alphawave Semi Reveals Suite of Optoelectronics Silicon Products addressing Hyperscaler Datacenter and AI Interconnect Market
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- Rapidus Announces Strategic Partnership with Quest Global to Enable Advanced 2nm Solutions for the AI Chip Era
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |