Perceptia confirms performance of 11-GHz 0.4-ps 40-nm DSP-based PLL hard IP Core
In addition to its industry-leading characteristics, the pPLL01 has a modest footprint of 400 by 500 micron, and it consumes only 15 – 20-mW. The PLL was proven in a 40-nm CMOS process, and is suitable for migration to other deep submicron processes and process nodes.
Perceptia's DeepSub™ technology is aimed at semiconductor processes of 65-nm and smaller, where conventional architectures have many challenges. DeepSub™ addresses those, and offers benefits including easy migration from one process to another and from one process node to another; smaller die area and lower power consumption. Performance is maintained over the full operating temperature and voltage range. DeepSub™ uniquely optimizes the mix of analog circuits and DSP, in order to consume very low power, and provide unsurpassed performance and flexibility.
Perceptia offers the DeepSub™ pPLL01 in the form of hard IP for qualifying customers, with integration support and optional migration and customization services.
Companies interested in integrating the pPLL01 IP into their SoC may contact Perceptia at 1 (831) 600-8850 or through sales@perceptia.com.
About Perceptia Devices, Inc.
Perceptia Devices is a US corporation, providing IC design services to high-end customers. Perceptia is based in Scotts Valley, California, with an additional design center in Sydney, Australia. Perceptia provides bleeding-edge RF and mixed-signal IC design services and IP, for frequencies up to 70-GHz and focuses on advanced foundry processes, including 40 and 32-nm. Perceptia uses top-of-the-line Electronic Design Automation technology.
Perceptia was founded in 2003 by a team of semiconductor industry veterans. Its target market includes IDMs, fabless semiconductor companies, and product companies.
www.perceptia.com
|
Perceptia Hot IP
Related News
- Analog Bits Low Jitter LC Tank PLL IP Targets Ultra High End Networking, Cloud Computing SoC's
- Cosmic Circuits tapes out Clocking Solutions in 40nm
- Avago Technologies First to 28-Gbps Performance with 40-nm SerDes
- True Circuits Introduces New Line of Phase-Locked Loop Hard Macros; Significantly Smaller PLL Sizes Achieved Without Sacrificing Performance
- Fluent.ai Offers Embedded Voice Recognition for Cadence Tensilica HiFi 5 DSP-Based True Wireless Stereo Products
Breaking News
- intoPIX Powers Ikegami's New IPX-100 with JPEG XS for Seamless & Low-Latency IP Production
- Tower Semiconductor and Alcyon Photonics Announce Collaboration to Accelerate Integrated Photonics Innovation
- Qualcomm initiates global anti-trust complaint about Arm
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- SiliconIntervention Announces Availability of Silicon Based Fractal-D Audio Amplifier Evaluation Board
Most Popular
- Qualcomm initiates global anti-trust complaint about Arm
- Siemens acquires Altair to create most complete AI-powered portfolio of industrial software
- Alphawave Semi Reveals Suite of Optoelectronics Silicon Products addressing Hyperscaler Datacenter and AI Interconnect Market
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- Rapidus Announces Strategic Partnership with Quest Global to Enable Advanced 2nm Solutions for the AI Chip Era
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |