Atmel Announces SiliconCity Flexible Architecture for Low-Cost Custom Defined SoC Development
SAN JOSE, Calif. -- Aug. 11, 2009 -- Atmel(R) Corporation (Nasdaq: ATML) announced today a new custom architecture for 90nm SiliconCity ASIC development, providing up to 350K gates/mm2, offering customers gate densities in the range of a standard cell ASIC. SiliconCity Flexible Architecture allows designers to create their own unique base wafer architecture for multiple product variations while generously reducing customer design time, lowering the NRE and reducing risk through design reuse.
ASIC development based on the architecture allows for lower mask fees and faster time to market. "Consider the fabless semiconductor company that has multiple products defined, all with slightly different features," said Jay Johnson, Marketing Director for Atmel's NA ASIC Business. "Creating a new ASIC for each one is too costly and time consuming. The old trick of multiple products on the same die with different bond options has run out of gas. That's the real value of SiliconCity Flexible Architecture."
The architecture relies on the breadth of Atmel's standard microcontroller solutions, to create SoCs including the reusability and proven IP that Atmel offers through its AVR(R) and AT91SAM standard products.
Metal Programmable Cell Fabric at the heart of the technology. MPCF is Atmel's patented ASIC technology that makes the CAP(TM) (customizable microcontroller) family of products, and SiliconCity Flexible Architecture, possible. In the case of CAP, Atmel defines the platform with ARM cores and bus subsystems, peripherals and memories. SiliconCity Flexible Architecture leaves the definition of the platform up to the user. By predefining the common embedded core and bus, memory and peripheral mix, the customer has the ability to implement unique IP for multiple products. The architecture gives the customer complete control, while MPCF gives it the flexibility.
MPCF offers a smaller core cell with better routing. The key to the MPCF technology is a 6 transistor core cell that is less than 3.2 square microns. In the 90 nm process, a SiliconCity Flexible Architecture ASIC yields between 300,000 and 350,000 gates per square millimeter. A novel routing scheme provides two layers of metal for interconnect, increasing gate utilization up to 90%. The combination of the higher gate density and better routability of MPCF-based SoC results in die sizes that are about half those of previous 130 nm generations.
Routing & Transistor Geometry Alignment. With MPCF, the cell size is matched perfectly to the integer multiple of the routing grid and transistor pitch, which results in no wasted silicon. In addition, contacts and vias are also the same size as metal trace, which eliminates any potential overlap and provides the most effective vertical use of silicon in the design. These aspects of MPCF make targeting the exact gate size required for the design much easier and more cost effective than the typical sea-of-gates architecture common with gate arrays and some early structured ASIC products.
In addition, MPCF metal-programmable cells and standard cells can be placed in separate regions on the die or freely mixed without any die size penalty. Therefore the fixed platform part of the design can be implemented in standard cell technology, while the flexible portion of the die with MPCF for quick derivative spins.
Easy Migration from Existing Processor-plus-FPGA Designs. Many existing designs based on an industry standard microcontroller and an FPGA may be directly migrated to a SiliconCity Flexible ASIC in as little as 20 weeks from final gate-level netlist with minimal re-engineering and low initial NRE mask charges. Future iterations of designs can be implemented in just 8-12 weeks with even lower single metal mask NRE charges.
Availability
Products based on the 90nm SiliconCity Flexible Architecture are available now. It is also available in 130nm.
About Atmel
Atmel is a worldwide leader in the design and manufacture of microcontrollers, advanced logic, mixed-signal, nonvolatile memory and radio frequency (RF) components. Leveraging one of the industry's broadest intellectual property (IP) technology portfolios, Atmel is able to provide the electronics industry with complete system solutions focused on consumer, industrial, security, communications, computing and automotive markets.
Information:
Atmel's SiliconCity Flexible Architecture information may be retrieved at: http://www.atmel.com/products/asic/architecture.asp?family_id=615
|
Related News
- Microchip's Low-Cost PolarFire® SoC Discovery Kit Makes RISC-V and FPGA Design More Accessible for a Wider Range of Embedded Engineers
- Xilinx and Xylon Deliver Flexible, Low-Cost Programmable logiTAP Platform for Embedded GUI System Development
- Introducing Signature IP Corporation - Providing a Configurable And Flexible Platform for SoC Development
- The Industry's First SoC FPGA Development Kit Based on the RISC-V Instruction Set Architecture is Now Available
- M31 Technology's Diversified TSMC 28HPC+ ULL Memory Compilers Empower More Flexible SoC Design Architecture
Breaking News
- Synopsys Responds to the European Commission Approving its Proposed Acquisition of Ansys in Phase 1
- M31's 12nm GPIO IP Adopted by C*Core Technology, Powering Innovation in Advanced Process Automotive Chips
- TTTech divests strategic stake in landmark transaction to NXP to fuel future growth with technology investments in core business
- Qualitas Semiconductor and Verisilicon signed a licensing agreement for 4nm PCIe 6.0 PHY IP
- Synopsys Responds to the UK Competition and Markets Authority Provisionally Accepting its Proposed Remedies in Phase 1 Regarding its Proposed Acquisition of Ansys
Most Popular
- Eighteen New Semiconductor Fabs to Start Construction in 2025, SEMI Reports
- VeriSilicon's Display Processing IP DC8200-FS has achieved ISO 26262 ASIL B certification
- OPENEDGES and TAKUMI partner to promote ORBIT Memory Subsystem IP in Japan
- CEVA Opens New Research and Development Center in Bristol, U.K.
- TTTech divests strategic stake in landmark transaction to NXP to fuel future growth with technology investments in core business
E-mail This Article | Printer-Friendly Page |