Altera Updates Third Quarter Guidance
SAN JOSE, Calif.--Sep. 8, 2009-- Altera Corporation (NASDAQ: ALTR) today announced that, based on quarter-to-date results and a broad improvement in market conditions, the company now expects third quarter sales to be in a range of flat to up 3 percent from the second quarter. Previous guidance had been for sales to decline 1 to 5 percent sequentially.
All market segments, except for the telecom and wireless segment, will be up sequentially in the third quarter. The decline in telecom and wireless is more moderate than previously anticipated as a result of better than forecast demand from OEMs supplying Asian wireless networks.
As previously announced, third quarter results will include approximately $4.5 million in severance costs, with nearly all of these costs being included in third quarter operating expense. These actions will create approximately $1.0 million in operating expense savings in the third quarter and, when fully implemented, approximately $9 million in annual run rate savings. Including the net effect of this restructuring, Altera now anticipates that third quarter operating expense will be in the range of $126 to $128 million compared with prior guidance of $122 to $126 million.
Design wins for Altera's newly launched 40-nm products continue to be very strong. As anticipated, third quarter sales of 40-nm products are likely to approximate $10 million, more than double second quarter levels.
About Altera
Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera’s FPGA, CPLD and ASIC devices at www.altera.com.
|
Intel FPGA Hot IP
Related News
Breaking News
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Creonic Introduces Doppler Channel IP Core
- Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
- RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?
- YorChip and ChipCraft announce low-cost, high-speed 200Ms/s ADC Chiplet
Most Popular
- Imagination pulls out of RISC-V CPUs
- Eighteen New Semiconductor Fabs to Start Construction in 2025, SEMI Reports
- BrainChip Brings Neuromorphic Capabilities to M.2 Form Factor
- RISC-V in AI and HPC Part 1: Per Aspera Ad Astra?
- Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
E-mail This Article | Printer-Friendly Page |