IBM Announces Highest Performance Embedded Processor for System-on-Chip Designs
LSI plans to integrate PowerPC(R) into its next-generation SoC multicore networking platform.
EAST FISHKILL, N.Y., Sept 15, 2009 -- IBM Corporation today announced the industry's highest performance, highest throughput processor for system-on-chip (SoC) product families in the communication, storage, consumer, and aerospace and defense markets.
LSI Corporation has collaborated with IBM on the development of the processor core, called the PowerPC(R) 476FP. LSI intends to utilize the 476FP PowerPC core in its next-generation multicore platform architecture for networking applications, .
The PowerPC 476FP operates at clock speeds in excess of 1.6 GHz, and 2.5 Dhrystone MIPS (million instructions per second) per MHz, delivering over two times the performance of IBM's most advanced embedded core currently available for the original equipment manufacturing (OEM) market. This level of performance also positions the 476FP as the highest performing embedded processor for System-on-Chip designs yet announced and available in the industry.
The processor extends the scalability of IBM's Power Architecture(R) in traditional embedded applications, and provides a growth platform for emerging applications such as 4G networks and WiMax infrastructure products.
The processor dissipates just 1.6 watts at these performance levels when fabricated in IBM's 45-nanometer, silicon-on-insulator (SOI) technology, positioning the 476FP as one of the most energy efficient embedded processor cores in the industry.
The 476FP offering includes an architectural extension of IBM's CoreConnect local bus technology (PLB6), supporting coherency for multiple processors and providing a level of scalability that is ideal for customers designing families of products and focusing on software re-use. The 476FP provides a seamless performance boost to all customers currently using the PowerPC 4xx family of processor cores, maintaining IBM's long-standing practice of protecting legacy software investments.
"We are pleased to announce this new embedded PowerPC processor," said Richard Busch, IBM director of ASIC products. "This high-performance, power efficient, compact processor core allows customers to meet the needs of today's applications, while preserving legacy code. Our collaboration with LSI brings together IBM's expertise in processor development with LSI's experience in networking and storage architectures, optimizing this core to address today's high-speed embedded requirements."
LSI has designed a configurable level 2 (L2) memory cache that is tightly coupled to the processor, which helps the PPC476 achieve its leading performance. There are three configurations of the L2 (256K, 512K and 1M) to allow customer optimization in a given application.
"LSI will be the first to offer products with the PowerPC 476FP core produced from our close collaboration with IBM," said Gene Scuteri, vice president, Networking Components Division, LSI. "Our use of the PowerPC 476 core, along with the configurable L2 cache that LSI developed as part of the collaboration, results in a powerful multicore processor subsystem that is well suited to future networking applications. The PowerPC 476 is a key building block in the next-generation multicore platform architecture from LSI."
The 476FP offering consists of the PowerPC 476FP, the Level 2 cache/cache controller, and PLB6, the latest architectural extension of the CoreConnect local bus architecture. Collectively, these elements enable SoC designers to easily and rapidly develop entire families of products, scaling the number of processor cores from 1 to 16 on the bus. The bus fabric on the PLB6 is capable of supporting up to eight coherent elements, giving SoC designers the flexibility to mix and match I/O masters, processors and other accelerators within the fabric.
In addition, the 3.6mm2 size and 1.6W power dissipation of the 476FP make it a good fit for air cooled applications, and the 45nm SOI technology provides radiation tolerance needed in aerospace and defense applications.
IBM PowerPC(R) microprocessors, embedded processors and cores are part of the IBM Power Architecture(TM) family of products, which span applications from consumer electronics to supercomputers. The IBM Power Architecture is an open microprocessor architecture offering scalability, flexibility and customization for leading high-performance and power-saving applications.
Details of the new processor core and L2 will be presented at the Linley Tech Processor Conference, Sept. 16-17 in San Jose.
The PowerPC 476FP hardcore is expected to be available to support designs starting in Oct 2009 with production in 4Q 2010. A synthesizable version is also expected in 4Q 2010.
About IBM: For more information about IBM's semiconductor products and services, visit www.ibm.com/technology.
|
Related News
- Novas Extends Industry-Standard Debug Platform for Embedded Processor-Based System-on-Chip Designs
- New Xilinx Connectivity, Embedded, and DSP Kits Enable Increased Productivity and Innovation for System-on-Chip Designs
- Cypress Revolutionizes Embedded Design with High Performance, Low Power PSoC® PSoC 5 Programmable System-on-Chip Architectures
- Tilera Now Shipping the TILE64 Processor: the World's Highest Performance Embedded Processor
- Dongbu HiTek Adds ARM926EJ-S Processor to Intellectual Property Portfolio in Support of System-on-Chip Designs
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |