Synopsys First IP Vendor to Demonstrate SuperSpeed USB 3.0 Host, Hub and Device IP in a Single Demonstration
MOUNTAIN VIEW, Calif. -- Sept. 22, 2009 -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the company will be the first IP vendor to show SuperSpeed USB 3.0 data transfers of an xHCI Host, Hub and Device digital controller IP in a single demonstration. Additionally, Synopsys' DesignWare® SuperSpeed USB 3.0 digital controllers have been tested successfully for interoperability with Texas Instruments' (TI) SuperSpeed USB 3.0 transceiver. The demonstration at the upcoming Intel Developer Forum in San Francisco will show simultaneous real-world SuperSpeed USB data transfer of high-definition video to a PC through a hub using the Synopsys DesignWare SuperSpeed USB 3.0 digital controllers and TI's SuperSpeed USB 3.0 transceivers.
WHAT: DesignWare SuperSpeed USB 3.0 Demonstration at Intel Developer Forum
WHEN: September 22-24, 2009
WHERE: Booth #823, Moscone Center West in San Francisco, Calif.
EXHIBIT HOURS:
- Tuesday - 4:00pm-8:00pm
- Wednesday - 11:00am-1:00pm & 6:00pm-8:00pm
- Thursday - 11:30am-1:30pm
For more information on DesignWare SuperSpeed USB 3.0, please visit: http://www.synopsys.com/dw/ipdir.php?ds=dwc_usb_3
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven interface and analog IP solutions for system-on-chip designs. Synopsys' broad IP portfolio delivers complete connectivity IP solutions consisting of controllers, PHY and verification IP for widely used protocols such as USB, PCI Express, DDR, SATA, HDMI and Ethernet. The analog IP family includes Analog-to-Digital Converters, Digital-to-Analog Converters, Audio Codecs, Video Analog Front Ends, Touch Screen Controllers and more. In addition, Synopsys offers SystemC transaction-level models to build virtual platforms for rapid, pre-silicon software development. With a robust IP development methodology, extensive investment in quality and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware.
Follow us on Twitter at http://twitter.com/designware_ip.
Also, visit the USB IP blog at http://www.synopsysoc.org/usb-blog/.
About Synopsys
Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
|
Search Verification IP
Synopsys, Inc. Hot IP
Synopsys, Inc. Hot Verification IP
Related News
- USB 4.0, USB 3.2, USB 3.1, USB 3.0, USB 2.0, Device, Hub, Host & Dual Mode proven Interface IP Controllers are available immediately to License
- PLDA USB 3.0 IP Reaches Key Milestone with 100th Design Win
- Synopsys' DesignWare SuperSpeed USB 3.0 xHCI Host Controller IP Receives USB-IF Certification
- Faraday Technology and Fresco Logic Partner to Validate SuperSpeed USB PHY (USB 3.0) with SuperSpeed Digital xHCI Host and Device Controller
- PLDA Announces SuperSpeed USB IP Solutions, Providing Designers With Immediate Ability to Integrate USB 3.0 Host And Device Functionality
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |