MIPS rolls out faster 64-bit RISC core, promises 1-GHz at 0.10-micron process
MIPS rolls out faster 64-bit RISC core, promises 1-GHz at 0.10-micron process
By Semiconductor Business News
February 14, 2002 (9:18 a.m. EST)
URL: http://www.eetimes.com/story/OEG20020214S0011
MOUNTAIN VIEW, Calif. -- Raising the speed stakes in the embedded processor market, MIPS Technologies Inc. announced a new 600-MHz version of its 64-bit MIPS64 RISC core for 0.13-micron process technologies. The new superscalar 20Kc "hard" core is scalable to 1-GHz speeds when produced in next-generation 0.10-micron processes, according to MIPS Technologies. Currently, the 64-bit RISC processor core is available for 400-MHz clock frequencies using a 0.18-micron CMOS process from Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC), said MIPS. The 20Kc is being licensed to IC developers as a physically fixed "hard" core block for cost- and power-sensitive applications, such as multimedia home gateways, automotive telematics, networking, office automation, and game consoles, said the Mountain View company. The announcement comes just several days after SandCraft Inc. in nearby Santa Clara announced a 600-MHz version of the 64-bit MIPS64 processor, based on a multi-pipelined design and produced by silicon foundry United Microelectronics Corp. (UMC) in Taiwan with a 0.15-micron copper process. SandCraft said more than a dozen companies are now evaluating its 64-bit processor IC, which is available in 500-, 550- and 600-MHz speed grades (see Feb. 11 story). Meanwhile, MIPS Technologies said its new 64-bit 20Kc core has been designed to allow systems designers to reduce end-product cost by integrating in software many features traditionally handled by dedicated hardware blocks. The company said the 20Kc core also meets and exceeds emerging standards and feature requirements in applications such as set-top boxes, residential gateways and high-end printers. "We have just dramatically reduced the time to market for designers of the most sophisticated SoCs [system-on-chips] for the next generation of systems," said Keith Diefendorff, vice president of product strategy at MIPS Tech nologies. "The 20Kc core is the industry's highest performance licensable hard core, but it still offers the low-power characteristics and low overall system cost that are so important for embedded applications. It is fully compatible with our 32-bit core family, giving our customers a seamless migration path to the higher performance world of 64-bit processing," he added. The new core is a dual-issue, seven-stage pipeline processor, which achieves a performance of 2.1 million instructions per second (1370 Dhrystone) and a peak of 2.4 Gflops (billion floating-point operations per second) at 600-MHz clock frequencies. It uses SIMD (single-instruction, multiple data) instructions in the floating-point unit, which MIPS Technologies said greatly accelerates the processing of large data streams, eliminating the need for a separate digital signal processor (DSP). The 64-bit core's power dissipation is 1.5 watts at 600 MHz operating at 1.0 volt, said the company. The processor core size is 8 mm2 . With two 32-kilobytes of cach, memory management unit and floating-point unit, core size is 20 mm2, said MIPS Technologies.
Related News
- New 64-Bit RISC Microprocessor from Toshiba Utilizes 0.13-Micron Process Technology to Achieve 300MHz Operating Frequency
- Toshiba launches new 64-Bit RISC microprocessor, its first standard processor based on high-performance TX99/H4 core and industry-leading 90nm process technology
- Toshiba Launches Two New 64-Bit RISC Microprocessors, Its First Standard Processors Based On Leading-Edge 90nm Process Technology
- New 64-Bit RISC Microprocessor From Toshiba Consumes Only 0.6W Power At Maximum 300MHz Operating Frequency
- EEMBC Publishes Benchmark Scores for Toshiba’s TMPR4927 MIPS-Based 64-Bit RISC Processor
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |