Rapid Bridge Tapes Out World's Smallest USB 2.0/3.0 PHY
Qualcomm to Acquire the Assets of Semiconductor Design Innovator Rapid Bridge (June 10, 2011)
Newest Member of LiquidPHY Product Family Has Significant Advantages over Competing Solutions
SAN DIEGO, November 17, 2009 --- Rapid Bridge, an innovator in advanced semiconductor design and development processes, announced today that it has taped out the world’s smallest USB 2.0/3.0 PHY. The USB 2.0/3.0 PHY is the newest member of Rapid Bridge’s LiquidPHY™ product family.
Small Footprint, Big Performance
Rapid Bridge’s new USB 2.0/3.0 PHY is at least 60 percent smaller than comparable solutions, consumes less power and is metal configurable. Rapid Bridge’s USB2.0/3.0 PHY supports USB On the Go (OTG) connectivity and is fully compatible with the USB 2.0 specification and all updates from the USB implementer’s Forum (USB-IF). In addition, Rapid Bridge’s USB2.0/3.0 PHY meets or exceeds the new USB 3.0 Super Speed specifications.
“We are very proud of our engineering team’s accomplishments in developing the world’s smallest, yet feature rich, USB PHY,” said Massih Tayebi, CEO of Rapid Bridge. “We believe our USB PHY will create significant value for our customers. The size and performance advantages are unprecedented and we invite chip designers to see for themselves. We are very excited about the opportunities before us.”
LiquidPHY Brings System-Level Advantages
Rapid Bridge’s LiquidPHY is a flexible subsystem developed to meet the challenges of advanced nanometer designs. LiquidPHY utilizes a system-level approach to achieve optimum performance, area and power profiles. Additionally, LiquidPHY integrates the IO, PHY functions and test circuitry within the IO slots creating the world’s smallest and fastest IO and PHY combination.
“At Rapid Bridge, we pride ourselves on superior circuit designs,” said Benny Malek-Khosravi, chief science officer at Rapid Bridge. “Our key differentiator is our system-level development approach and architecture. We take a global view of optimization to produce efficiency gains in power and area.”
The system level advantages of Rapid Bridge’s Liquid platforms coupled with its metal programmability provide a matchless combination of flexibility and performance to enable the next generation of IC designs.
Availability
For more information on the USB 2.0/3.0 PHY or any other Rapid Bridge product, please contact info@rapidbridge.com.
About Rapid Bridge
Rapid Bridge is a semiconductor technology company with a unique approach to addressing the industry’s issues of cost, performance, power and time to market. Rapid Bridge’s patented technology is baked into the product portfolio: LiquidIP™, LiquidASIC™ and LiquidSoC™. LiquidIP is a robust IP portfolio which includes the smallest and highest performing IPs in the industry. LiquidASIC lowers cost barriers and includes a complete collection of pre-defined ASIC platforms, interface subsystems and foundations IPs. LiquidSoC provides the industry’s most cost efficient SoCs with customer-defined die size and IP resources, regular layout structures, and full programmability. Rapid Bridge enables the industry’s genius. For more information on Rapid Bridge, visit us at www.rapidbridge.com .
|
Related News
- Introducing USB 3.0, PCIe 2.0 and SATA 3.0 Combo PHY IP Cores to empower Next Gen Connectivity Chipsets
- Unveiling Silicon-proven USB 3.0 PHY IP Core in 22nm, Elevating High-Speed Data Transmission with Advanced Transceiver Technology, backward compatible with USB 2.0
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP cores with Superfast speed and High-power efficiency for lag-less data processing is Silicon Proven and available in 8nm LPP for licensing
- USB 4.0, USB 3.2, USB 3.0, USB 2.0 Silicon Proven PHYs in TSMC, UMC & SMIC Foundries available from T2MIP
- Faraday Unveils the Industry's Smallest USB 2.0 OTG PHY IP
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |