Altera Ships Stratix IV E FPGA Development Kit Featuring a 530K Logic Element FPGA
Develop and Test DDR3 DIMM Memory Subsystems with Stratix IV E FPGA Development Kit
San Jose, Calif. -- December 8, 2009—Altera Corporation (NASDAQ: ALTR) today announced the availability of its latest development kit targeting Stratix® IV FPGAs. The Stratix IV E FPGA Development Kit features the industry's highest density, highest performance FPGA available. The kit provides users with a comprehensive design environment that includes the hardware and software needed to immediately begin prototyping their high-density designs.
The Stratix IV E FPGA Development Kit is based on a high-performance, high-density Stratix IV EP4SE530 FPGA. The FPGA features 530K logic elements (LEs) and provides on average 25 percent higher performance than currently available competitive FPGAs. The performance and density advantage offered by the Stratix IV EP4SE530 FPGA enables customers using the Stratix IV E FPGA Development Kit to fit their large designs into a single device and achieve fast timing closure.
The Stratix IV E FPGA Development Kit is the first kit available to feature an FPGA interfacing with a 533-MHz DDR3 DIMM. Using this kit, customers can develop and test memory subsystems consisting of DDR3 DIMMs, QDR II+, and RLDRAM II memory interfaces.
The Stratix IV EP4SE530 FPGA is pin compatible with Stratix III FPGAs. This pin compatibility allows customers to seamlessly migrate their Stratix III FPGA design to a higher density Stratix IV E FPGA. Customers can also seamlessly convert their final Stratix IV E FPGA design to Altera's low-cost HardCopy® IV E ASIC. Upon silicon availability in 2010, customers will also be able to migrate their Stratix IV E FPGA design to a higher density EP4SE820 device, which Altera previously announced in September 2009.
The Stratix IV E FPGA Development Kit includes:
- Development board featuring a Stratix IV E EP4SE530 FPGA
- Board test system with design examples
- 2-GB DDR3 SDRAM DIMM with a 72-bit data bus
- 72-Mb QDR II+ SRAM device with a 18-bit data bus
- 576-Mb RLDRAM II CIO device with a 36-bit data bus
- CD-ROM containing design examples
- Nios ® II Design Suite license
- Quartus ® II Design Software, Development Kit Edition (DKE)
Pricing and Availability
The Altera ® Stratix IV E FPGA Development Kit is available today and is priced at $9,995. To learn more about the development kit, or to order, visit www.altera.com/products/devkits/altera/kit-stratix-iv-e.html.
About Altera
Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera's FPGA, CPLD and ASIC devices at www.altera.com.
|
Intel FPGA Hot IP
Related News
- Altera Eases Development of 40-nm FPGAs with Stratix IV GX FPGA Development Kit
- Altera Delivers Stratix IV GX Transceiver Signal Integrity Development Kit
- Altera Ships Industry's Highest Density FPGA Featuring 340K Logic Elements
- Altera Ships Arria GX Development Kit for Low-Cost FPGA Transceiver-Based Designs
- Altera Ships Industry's First FPGA-based Audio/Video Development Kit Supporting Triple Rate SDI
Breaking News
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |