ASIC pioneer reinvents 3-D FPGAs
R. Colin Johnson, EE Times
(01/29/2010 3:35 PM EST)
PORTLAND, Ore.—Serial entrepreneur Zvi Or-Bach is touting a three-dimensional field-programmable gate array (FPGA) technology that he claims could achieve the densities of an application specific integrated circuit (ASIC). Or-Bach's new company, NuPGA, presented details about its 3-D FPGA technology Friday (Jan. 29) at the Applied Materials Technical Symposium on 3-D Interconnect in Santa Clara, Calif.
Or-Bach, a past winner of the EE Times Innovator of the Year Award, previously pioneered ASICs at eASIC and later at Chip Express. Last year, Or-Bach applied for a patent with Rice University on a graphite-based memory process for creating reprogrammable memory elements, which NuPGA is now using as anti-fuses for its 3D FPGAs.
E-mail This Article | Printer-Friendly Page |
Related News
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models