Innopower Offers Industrial-leading Miniaturized Cell Library, the miniLib+ and miniIO+, in 130nm, 110nm, 65nm and 55nm Technologies
Hsinchu, Taiwan, February 2, 2010 -- Innopower Technology Corporation, a wholly owned subsidiary of Faraday Technology Corp. (TAIEX:3035), announced today the availability of the industrial-leading miniaturized cell libraries, miniLib+™ and miniIO+™, in 130nm, 110nm, 65nm and 55nm Technologies. The advantages of these libraries include both area density improvement and power reduction with little tradeoff when compared to other library implementations.
Chips designed with miniLib+™ will see significant area and power benefits. Compared to other high density libraries, the miniLib+™ can achieve an average of about 16% in area reduction for the same design. This is good news for the cost-sensitive applications, such as home networking, PC peripherals and multimedia processors. Furthermore, based on benchmark results, the dynamic power and static power can be reduced by about 23% and 28% respectively. For easier routing, the pin accessibility to each cell is optimized for fast physical design turnaround time. The required routing time for the same design could be reduced by about 30%. It is clear that the area improvement does not sacrifice performance nor create routing congestion.
The miniLib+™ is available with different transistor–voltage-thresholds. Low-voltage-threshold(LVt), regular-voltage -threshold (RVt) and high-voltage-threshold (HVt) versions are available in 130nm, 110nm, 65nm and 55nm processes, depending on the customer's performance and power requirements. The fusion of LVt, RVt, and HVt libraries is also available by request.
Innopower has also announced the availability of its innovative IO library called the miniIO+™. Compared with general IO pads, the advantage of the miniIO+™ is the about 30% area reduction while achieving better ESD performance.
"We are very glad to offer such highly optimized and competitive cell libraries to our customers," said Raymond Leung, Chief Technology Officer at Innopower. "The market trend and customer demand for low power and smaller die size are key drivers for the Innopower's miniLib+™ and miniIO+™ development. With the introduction of these creative library solutions, we believe we can enable our customers to meet their design goals more easily and more quickly.”
Availability
Innopower's miniLib+™ and miniIO+™ are now available in 130nm, 110nm, 65nm and 55nm processes. The miniLib+™ and miniIO+™ have been silicon proven in various foundries through real chips.
About Innopower Technology Corporation
Founded in 2008, InnoPower aims to provide competitive semiconductor intellectual properties (IP) for foundries, IDM's and fabless design companies. While still young as a separate legal entity, it leverages past development experience, extensive automation capabilities and acquired patent portfolio to offer advanced silicon IP's. These products are highly differentiated and most of them are production proven. InnoPower also has a strong engineering team with established industry track record and highly innovative. The initial product offering focuses on the fundamental libraries (standard cells, memory compilers and I/O's) but will be expanding to special I/O's and functional IP's (such as USB, PCIX) in the near future. For more information, please visit : www.innopower-tech.com
About Faraday Technology Corporation
Faraday Technology Corporation is a leading fables ASIC and silicon IP provider. With 2009 revenue of US$ 160 million, Faraday is one of the largest fabless ASIC companies in the Asia-Pacific region, and it also has a significant presence in other world-wide markets. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan , Europe, and China. For more information, please visit: www.faraday-tech.com
|
Faraday Technology Corp. Hot IP
Related News
- Innopower First to Deliver Complete Memory Compiler and Miniaturized Cell Library, miniLib+, for 55nm LP(Low Power) process
- Faraday Offers the Miniaturized Cell Library miniLib in both 90nm and 65nm
- Innopower Accelerate SoC Performance with 1.2GHz in 55nm
- Faraday Offers 55nm/ 65nm miniIO with around 40% Area-Saving and Robust ESD Performance
- Faraday Unveils M1+ Library with Enhanced Routability on UMC 28HPC Process
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |