CEVA Unveils Industry's First Multipurpose Programmable HD Video and Image Processing Platform for Connected Multimedia Devices
CEVA-MM3000(TM), fully software programmable, low-power platform utilizes scalable, configurable multi-core architecture to support advanced video codecs and image signal processing for portable multimedia and home entertainment devices
BARCELONA, Spain, Feb. 15, 2010 -- Mobile World Congress – CEVA Inc, (Nasdaq: CEVA; LSE: CVA), a leading licensor of silicon intellectual property (SIP) platform solutions and DSP cores, today unveiled CEVA-MM3000™, a fully programmable, HD video and imaging platform specifically designed for the connected generation of portable multimedia and home entertainment devices. CEVA will demonstrate the CEVA-MM3000 platform at Mobile World Congress, February 15-18 in Barcelona, Spain.
Based on a heterogeneous, scalable multi-core architecture, this low-power, platform delivers full-HD, 1080p video decode and encode at up to 60 frames per second (fps), supporting advanced video standards, including H.264, VC1, Real Video, AVS, VP6/7/8, as well as future standards such as SVC (Scalable Video Codec) and MVC (Multi-view Video Codec, for 3D video). CEVA-MM3000 also readily supports both video and image pre/post processing algorithms such as scaling, stabilizer, and noise reduction in addition to many proprietary add-on applications, for example, augmented reality, gesture recognition and face detection. Crucially, these additional algorithms and proprietary applications enabled by CEVA-MM3000 allow designers to reach new levels in multimedia innovation and performance, while offloading and even eliminating engines normally required to handle these complex features in a multimedia SoC.
Multi-core Architecture Designed for Low Power, Ease of Programmability
Designed as a unified and coherent architecture, CEVA-MM3000 utilizes a heterogeneous, multi-core approach to address the extreme and diverse processing requirements of video and image signal processing. The core of the platform consists of two specialized processors, a Stream Processor and a Vector Processor, combined into a complete multi-core system, including local and shared memories, peripherals, DMA and standard bridges to external busses. This comprehensive multi-core platform was designed specifically to meet low-power requirements for mobile devices. For example, an H.264 HP decoding at 1080p 30fps requires as low as 150mW in a 40nm process.
The Stream Processor is responsible for bit stream coding, bit stream manipulation, and control code execution, while the Vector Processor performs filtering and vector type operations typical for pixel processing. Both the Stream and the Vector processors are designed for ease of programmability, and are supported by an optimizing C-compiler and application profiler. A set of pre-optimized video kernels for both processors is available to licensees, enabling the flexibility to combine efficient low-level code with rapid C-level development.
"Consumers' appetite for higher video quality and enhanced functionality is seemingly insatiable. CEVA-MM3000 is a flexible, scalable and robust software-based platform capable of addressing these requirements in consumer devices. Uniquely, it contradicts conventional wisdom that implementing a video engine supporting 1080p requires a hardware design," said Joseph Byrne, analyst at The Linley Group and author of 'A Guide to CPU Cores and Processor IP'. "The programmable nature of the architecture allows it to efficiently support not just video standards but also enable customer-proprietary post-processing algorithms and next-generation features like object recognition."
"The advent of 4G wireless and the dawn of the connected home will profoundly change the way we access and view our multimedia content," said Gideon Wertheizer, CEO of CEVA. "1080p High Definition is becoming a de facto standard in every type of multimedia-enabled device along with the requirement to support a growing number of video codecs. CEVA-MM3000's high-performance, multi-core scalable architecture delivers the performance and flexibility to address these precise requirements in a software-based, low-power and cost-effective platform for any connected multimedia device. In addition, the unique video and image pre/post processing algorithm support enables our licensees to truly differentiate their video processor designs with proprietary features and functions."
Scalability and Programmability Enable Vast Array of Optimized Applications
To efficiently meet the precise requirements of a wide range of portable multimedia and home entertainment applications, CEVA-MM3000 utilizes a scalable and heterogeneous architecture. The number of Stream and Vector Processors in addition to the type and size of the memories can be configured to address each specific use-case. This scalability enables CEVA-MM3000 to deliver the optimal balance of power and performance for full-HD requirements in Smartphones, PMPs, Tablets and other mobile devices, through to Blu-ray DVD players, HDTVs, game consoles and multi-stream devices.
As a fully programmable engine, CEVA-M3000 readily supports any codec or other video-processing software. This programmability enables SoC designers to quickly adopt new video standards through software upgrades, requiring no changes to the hardware, and also easily develop proprietary video and imaging applications, including pre- and post-processing and video analytics. The resulting flexibility extends product life-cycle, enables design re-use and allows customers to differentiate their product offering with non-standard imaging or proprietary algorithms.
CEVA-MM3000 Key Features
- Industry's Highest Performance HD Video and Image Processing Platform for Connected Devices
- Built to support most advanced video codecs and profiles, including H.264, VC1, Real Video, AVS, VP6/7/8, up to 1080p 60fps
- Architecture ready for future standards including MVC (3DV), SVC and H.265
- Encoding of H.264 HP at 1080p using the same platform
- Heterogeneous, Multi-core Architecture Optimized for Video and Image Signal Processing
- Stream Processor - Responsible for bit stream coding, bit stream manipulation, and control code execution
- Vector Processor - Deep SIMD processor for parallel filtering and pixel processing
- Scalable & Configurable
- Same architecture scaling from 720p to 1080p 60fps, from 6Mbps to 50Mbps
- Number and type of vector processors and stream processors is scalable
- Configurable memory size depending on the required performance
- Supports decoding of multiple streams, transcoding and video conferencing
- Multipurpose Platform, Supporting Various Video/Image Processing Needs
- Supports pre/post processing algorithms such as scaling, mirror, white balance, noise removal and DRC
- Supports Intelligent Video Processing including augmented reality, gesture recognition, face and object recognition
- Integrated software development tools
- Including compilers, multi-core debugger, simulators for each core and for the entire system
- Rich library of pre-optimized video kernels and filters
- Easily upgradeable to support any codec / profile software from CEVA / third parties / customers developments
Development Tools and Support
As with all CEVA DSP cores and platform solutions, CEVA-MM3000 is supported by a robust Software Development Toolkit that includes optimizing C-compilers, IDE, debugger, simulators and profiler. The user-friendly IDE helps developers implement, debug, optimize and run code on the CEVA-MM3000. To aid Vector Processor optimization, the IDE provides a view into to all core and memory resources. The IDE also includes a multi-core debugger GUI which provides visibility across the Stream and Vector Processors. In addition to helping locate software flaws, this debugger aids performance analysis and optimization. CEVA also offers an optimized library of video kernels, to allow licensees quick and easy application development.
CEVA-MM3000 Demonstration
At Mobile World Congress, February 15-18 in Barcelona Spain, CEVA will demonstrate the CEVA-MM3000 platform. CEVA's booth is located at 1G45, in Hall 1.
Availability
CEVA-MM3000 is currently available for licensing to lead customers only. For more information, contact sales@ceva-dsp.com.
For more information about CEVA-MM3000, visit www.ceva-dsp.com/HD
About CEVA, Inc.
Headquartered in San Jose, Calif., CEVA is the leading licensor of silicon intellectual property (SIP) DSP Cores and platform solutions for the mobile handset, portable and consumer electronics markets. CEVA's IP portfolio includes comprehensive technologies for cellular baseband (2G / 3G / 4G), multimedia, HD audio, voice over packet (VoP), Bluetooth, Serial Attached SCSI (SAS) and Serial ATA (SATA). In 2009, CEVA's IP was shipped in over 330 million devices, including handsets from all top five handset OEMs – Nokia, Samsung, LG, Motorola and Sony Ericsson. Today, more than one in every four handsets shipped worldwide is powered by a CEVA DSP core. For more information, visit www.ceva-dsp.com
|
Ceva, Inc. Hot IP
Related News
- Celoxica Unveils Next-Generation Video and Imaging Platform; RC340 programmable platform fully integrated into ESL-design flows for real-time video, image and data streaming applications
- CEVA Announces Silicon-based Platform to Streamline Development of Low-Power 'Smart and Connected' Devices
- CEVA Unveils Wi-Fi IP Platforms to Enable a Broad Range of Connected Devices
- Almalence Ports Optimized Image Processing Software onto Tensilica's New IVP Imaging/Video DSP
- CEVA Announces Availability of CEVA-MM3101, a Programmable, Low Power Imaging and Vision Platform for Camera-Enabled Devices
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |