Mixel's MIPI D-PHY IP Licensed by Canesta
Mixel’s Silicon-proven MIPI ® D-PHY IP Enables Quick Time to Market
San Jose, CA — February 15, 2010 — Mixel® Inc., the leader in mobile Mixed-Signal IP (Intellectual Property) announced today that Canesta is using Mixel’s MIPI (Mobile Industry Processor Interface) D-PHY. Canesta is the inventor of revolutionary, low cost electronic perception technology and leading provider of single chip CMOS 3-D sensors that fundamentally change the relationship between devices and their users. Mixel’s D-PHY IP is the physical layer IP compliant with the MIPI D-PHY version 1.0. The controller was provided by GDA Technologies (An L&T Infotech company), of San Jose, CA, one of Mixel’s MIPI controller partners.
"For our cutting-edge products, first-time success and aggressive schedule -- two conflicting requirements -- are both mandatory," said Patrick O'Connor, Vice President of Engineering at Canesta. "Key to our decision to work with Mixel was its silicon-proven technology, its leadership in the MIPI PHY market, and the short schedule Mixel committed to. And then, Mixel delivered two weeks ahead of schedule!“ he added.
“We are delighted that Canesta is able to incorporate the Mixel D-PHY IP into these very important next generation 3-D sensors,” said Ashraf Takla, President and CEO of Mixel, Inc. “We are proud to be able to add Canesta to our rapidly growing list of MIPI PHY Licensees, and look forward to supporting them over the long term,” he added.
The Mixel D-PHY and GDA MIPI controller have been licensed and validated in silicon by a number of customers. The two IP from Mixel and GDA work together seamlessly and in all occasions first silicon performed flawlessly.
For more information regarding Mixel MIPI D-PHY, please visit us at the MIPI Alliance Zone at the 2010 MobileWorld Congress, Hall 2, Stand 2H41,
About Mixel
Mixel is the leader in mixed-signal mobile IPs and offers wide portfolio of high performance mixed-signal connectivity IP solutions. Mixel’s mixed-signal portfolio includes Mobile PHYs (MIPI D-PHY, M-PHY, and MDDI), PHYs and SerDes (suitable for PCI Express, SATA, EPON, XAUI, Fiber Channel, DDR, and LVDS), general purpose Transceivers, and high performance PLL, DLL IP cores. For more information contact Mixel at info@mixel.com or visit www.mixel.com.
|
Mixel, Inc. Hot IP
Related News
- Mixel MIPI D-PHY IP Integrated into Teledyne e2v's new Topaz CMOS Image Sensors
- Mixel Announces Availability of the World's First MIPI C-PHY/D-PHY Combo IP Supporting 30 Gbps
- Mixel's MIPI D-PHY IP Integrated into the Lattice CrossLink-NX FPGA
- Mixel's MIPI D-PHY IP Integrated into Microsoft's Azure Kinect DK Depth Camera
- Mixel's MIPI C-PHY/D-PHY Combo IP is Silicon-Proven in Multiple Nodes
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |