Startup revisits reconfigurable computing

Startup revisits reconfigurable computing
By Loring Wirbel, EE Times
November 16, 2001 (12:28 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011116S0067

DENVER — A small Utah startup has reawakened the potential of FPGA-based reconfigurable computing by releasing an algorithmic synthesis language and a desktop supercomputer that use the language on Xilinx Inc. FPGAs.

StarBridge Systems Inc. (Midvale, Utah) started life in 1998 as a technology licenser, but chief technology officer Kent Gilson said the company intends to ship its HAL-15 supercomputer while offering its Viva 1.1 language as an open-architecture synthesizer for multiple types of FPGAs.

Vendors have had a tough time separating reconfigurable concepts from specific hardware instantiations, Gilson said, so StarBridge wanted to show it could demonstrate its generic Implementation-Independent Algorithmic Description Language on a hardware vehicle. The deskside HAL-15 parallel computer and the Viva language were offered as a $65,000 development kit at Supercomputing 2001 here this week.

StarBridge has developed what it calls Hyp er-Specificity cores that can perform a mix of scalar, vector and DSP applications, depending on how Viva synthesizes the algorithms. When the operations are instantiated on Xilinx 4062-8 FPGAs, the resulting processor chips are called Pensa processors. StarBridge has implemented 10 Xilinx FPGAs on the central board in its HAL-15 system: eight for general-purpose Pensa processing, and two dedicated to I/O operations.

Gilson has 15 years of experience working with Xilinx architectures, having developed his first retargetable design in the mid-1980s, when he was still a teenager. After working in vertical markets with Metalithics Inc. and other small companies in the 1990s, Gilson formed StarBridge with partner Brent Ward in 1998.

Viva's range

The founders realized that existing FPGA development tools were inadequate for implementing very fine-grained, asymmetric operations, so the definition of the visually oriented Viva language became the first goal. HAL-15 and an upcoming rack-mounte d successor were developed as vehicles for showing what Viva could implement.

The eight-processor system in HAL-15 can achieve 40 billion multiply-accumulate operations or 15 gigaflops per second. But Gilson said he hopes many developers will look to StarBridge to implement their own concepts for reconfigurability rather than just take on a static HAL-15 instantiation.

StarBridge may have favored Xilinx because of Gilson's history with the architecture, but Viva can be mapped to any physical hardware, he said.

Viva provides a formal symbolic representation for different data sets and allows library elements with different information-rate requirements to be treated as equivalents. The language will automatically correlate disparate library elements for optimal performance.