Xilinx Demonstrates Cost and Power Reductions for 40G OTN Muxponder With Partial Reconfiguration Technology
FPGA-based implementation showcases unique on-the-fly reconfiguration capabilities that reduce CapEx and OpEx of multi-port optical network applications
SAN JOSE, Calif., March 16, 2010 -- Xilinx, Inc. (Nasdaq: XLNX) today announced it will demonstrate the latest breakthrough 40-Gigabit Optical Transport Network (OTN) developments for integrated multiplexer/transponder (muxponder) applications at the 2010 Optical Fiber Communication Conference and Exposition. The demonstration combines proven partial reconfiguration technology from Xilinx with OTN IP solutions from Avalon Microelectronics Inc. to significantly reduce downtime and lower the bill of materials (BOM) cost and power consumption of multi-port (channel) networks.
Network operators can reduce overall capital expenditures (CapEx) and operating expenses (OpEx) with 'on-the-fly' reconfiguration of a selected port or multiple ports without having to power down the entire line card and when other ports are still up and running.
Using the unique partial reconfiguration capabilities available with Xilinx's high-performance Virtex(R) FPGAs, developers can also reduce muxponder size by 30 to 40 percent and lower power consumption as compared to devices without partial reconfiguration. Demonstrations by Xilinx and Avalon can be seen at OFC 2010 from March 23rd through March 25th at the San Diego Convention Center in Xilinx booth #3121 and Avalon booth #3231.
"The rapid deployment of residential video and boom of advanced personal and business services traffic continues to drive the evolution of wired communications to 40G and 100G OTN. At the same time, system operators and network carriers are being pushed toward integrated networking solutions to deliver any-port and any-service with lower costs, reduced power, and high quality of service," said Gilles Garcia, director of wired communications business at Xilinx. "Our partial reconfiguration capabilities leverage the aggressive performance of Virtex devices and Avalon's IP to enable cost and power reductions for wired communications. They also preserve the investments of telecomm equipment providers by enabling in-field system and port upgrades with the latest protocols and standards for longer time in market."
Enabling Multi-channel OTN Applications
Partial reconfiguration is the ability to dynamically modify logic blocks by downloading partial bit files without interrupting the operation of the remaining logic. The 40G OTN muxponder demonstration system deploys this technique to enable four independent ports (client channels) with support for OTU2, OC-192/STM-64, and 10GE LAN industry standards as examples. It uses an Avalon 40G test board ("Anaconda") jointly developed with Xilinx using two Virtex-5 LX330T FPGAs. An external 10G tester is connected to generate traffic and monitor each port for interference.
Each channel can be reconfigured on the fly by re-loading a partial bit stream to the Xilinx FPGA that instantiates only the chosen port persona rather than all possible port configurations as required by ASSP and ASIC implementations. This approach enables developers to use fewer and smaller devices to implement the FPGA-based 40G OTN muxponder. Developers can also save 30 to 45 percent of the logic capacity available in the two Virtex-5 devices and lower power consumption by eliminating the need to instantiate multiple clients per channel. For applications targeting the latest generation Virtex-6 FPGAs, single-chip implementation may be possible depending upon the specific configuration.
About Xilinx in Wired Communications
Xilinx is the worldwide leader in programmable logic solutions that offer scalable performance, flexibility, and re-configurability for longer time in market of wired communications systems. Xilinx Targeted Design Platforms simplify system development and enable greater differentiation for 10G, 40G, and 100G networking applications. For more information on how Xilinx enables wired system manufacturers to bring low cost, innovative products to market faster, visit: www.xilinx.com/wired.
|
Xilinx, Inc. Hot IP
Related News
- Xilinx Demonstrates New Broadcast Offerings That Lower Cost and Power of Serial Digital Interfaces
- Xilinx Announces 1.6Gbps Low Power, Low Cost, Small Cell Backhaul Modem SmartCORE IP for Millimeter Wave Applications
- Vivado Design Suite 2013.3 Accelerates Productivity with Design Methodology, Next Generation Plug-and-Play IP, and Partial Reconfiguration
- Xilinx ISE Design Suite 13.2 Steps Up Designer Productivity and Brings Partial Reconfiguration to Kintex-7, Virtex-7 FPGAs
- Avalon's 2D FEC enables reduced chip size and increased power savings
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |