Virage Logic Extends Non Volatile Memory Leadership; Announces AEON(R) Multi-Time Programmable Parallel NVM Qualified in TSMC 130nm G Process

Licensed to Multiple Lead Customers in the 130nm G Process AEON Has Over 700 Instances Qualified and Available at TSMC from 250nm to 65nm

SAN JOSE, Calif., Apr 13, 2010  -- TSMC Technology Symposium -- Virage Logic Corporation (NASDAQ:VIRL), the semiconductor industry's trusted IP partner, today expanded its industry leading portfolio of multi-time programmable (MTP) non-volatile memory (NVM) with the qualification of AEON MTP Parallel NVM at TSMC. AEON MTP Parallel NVM now available in 130-nanometer (nm) G process is targeted at analog mixed-signal applications now migrating from 180nm down to 130nm. AEON MTP Parallel NVM provides a reprogrammable non-volatile memory solution to trim precision ADC (analog to digital converters) and DAC (digital to analog converters), to store encryption/decryption keys, and to configure MEMS devices.

AEON MTP Parallel NVM is ideal for use in portable devices, such as multi-function cell phones that require NVM for precision analog trim values to optimize the performance of the audio, display, or sensor IC in an on-board accelerometer and gyroscope. The NVM also serves to provide encryption key storage for digital rights management (DRM), configuration settings for Bluetooth or WiFi connections, and custom personalization settings in baseband processors. The total available NVM core market is considerable. El Segundo, California-based market research firm iSupply estimates that 1.2 billion mobile devices--cell phones, e-books, netbooks, and others--shipped in 2009; that figure is projected to reach 1.5 billion units in 2012.

"With the availability of AEON MTP Parallel NVM in the TSMC 130nm process, Virage Logic is prepared in advance to supply customer demand for parallel reprogrammable non-volatile memory at the 130nm process node," said Dr. Yakin Tanurhan, vice president and general manager of Virage Logic's Processor and NVM Solutions business units. "Because AEON MTP Parallel NVM is available in a wide range of TSMC standard logic CMOS processes with no additional masks or processing steps required, Virage Logic customers can easily migrate their designs from one TSMC process node to another without having to change their NVM solution."

About AEON NVM

AEON is available on leading foundries and in addition to being available on standard CMOS processes from 250-nanometer (nm) to 65nm, AEON is designed for Bipolar / CMOS / DMOS (BCD) processes optimized for power management and high voltage applications. Virage Logic's AEON products are all compatible with standard CMOS processing and offer industry leading solutions in terms of power consumption for RFID applications and temperature range for power management. Supporting bit counts from 8 bits up to 16k bits, Virage Logic's embedded NVM has been qualified to TSMC's 65-nm low power logic CMOS process with 2.5V IO option. Virage Logic's embedded NVM product line enables 100-percent electrical testing at wafer sort and eliminates costly field programming failures associated with one-time programmable (OTP) solutions. Optimized to enable considerable manufacturing and operational flexibility, final calibration can be performed at wafer test, post-packaging, or in the field. In addition, identical ICs can be calibrated and configured to implement different features at final test, immediately prior to shipping. Full characterization and qualification data is available upon request.

About Virage Logic

Virage Logic is a leading provider of semiconductor intellectual property (IP) for the design of complex integrated circuits. The company's highly differentiated product portfolio includes processor solutions, interface IP solutions, embedded SRAMs and NVMs, embedded test and yield optimization solutions, logic libraries, and memory development software. As the semiconductor industry's trusted IP partner, more than 400 foundry, IDM and fabless customers rely on Virage Logic to achieve higher performance, lower power, higher density and optimal yield, as well as shorten time-to-market and time-to-volume. For further information, visit http://www.viragelogic.com.

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