Genesys Testware Adds Support for Fuse Arrays to Improve the Yield of Embedded Memories

Genesys Testware pioneered the use of a complementary repair technology called dynamic soft repair. Instead of using programmable fuses, dynamic soft repair utilizes multiplexors that can switch between a bad data bit and a good redundant bit. Every time the chip powers up, the memory is tested and reconfigured if a failure is present.

"Most System on Chip (SoC) designs contain several megabits of dense high speed memory. With so much embedded memory, the manufacturing yield of such an SoC is primarily
dependent on the yield of the embedded memory," said Craig Thrower, Director of Memory Products Engineering at Virtual Silicon Technology, a provider of embedded memory to SoC developers. "It is therefore essential to the viability of the SoC, that some form of repair scheme be implemented to improve the memory yield."

"Our dynamic repair scheme reconfigures the embedded memories at power-up to correct any memory faults. This power-on-reconfiguration time may be too long for some applications. So we added support for the fuse based repair of embedded memories to our Memory BistCore Ultra product," said Bejoy Oomman, President of Genesys Testware. "With this addition we now have the most comprehensive embedded memory repair solution in the industry. Both schemes can be used effectively to improve the yield of embedded memories.

The BISTD solution uses the same silicon proven diagnosis engine that is used in our dynamic soft repair technology. However the results of the diagnosis engine are not directly interfaced to the repair circuitry as in the case of the dynamic soft repair. Instead, the results are shifted out and remapped to physical co-ordinates for laser fuse blowing. The Gtshell integration tool from Genesys Testware automates the wiring of the BISTD circuitry with the memory and the fuse array. Gtshell also generates test pattern data in the TSSI WGL format to facilitate the fuse map calculation. Gtshell understands the redundancy schemes and repair interfaces to most popular memory compilers such as Artisan, Dolphin, Virage Logic and Virtual Silicon. This makes it easy for SoC designers to implement either BISTD or dynamic soft repair in their design.

BISTD for embedded memories with fuse arrays is a no cost option for existing customers of Memory BistCore Ultra. Memory BistCore Ultra starts at $42,000 for a single project license and $140,000 for a site license.
 

About Genesys Testware
Genesys Testware, Inc. provides a comprehensive suite of embedded test solutions that covers memory test, logic test and boundary scan. Its products are all silicon-proven in various customer designs. For more information, please visit the company's web site at http://www.genesystest.com