EVE Adds Support for TLM-2.0 to ZeBu Hardware-Assisted Verification Platforms
Provides Interoperability, Ties Emulation More Closely to ESL, Hardware Verification Environments
SAN JOSE, CALIF. –– June 1, 2010 –– EVE, the leader in hardware/software co-verification, today announced that ZeBu fast emulation platforms support the Transaction-Level Modeling Standard (TLM)-2.0, the Open SystemC Initiative (OSCI) interface standard for SystemC model interoperability and reuse, through a TLM-2.0 transactor adapter.
TLM-2.0 support for ZeBu enables the creation of high-performance hybrid virtual platforms that combine SystemC and register transfer level (RTL) models, in a fully scalable, accurate and flexible manner, bridging the gap between software modeling and hardware implementation.
“The efficient debugging and analysis capabilities available with virtual prototypes enable software developers to start their work much earlier in the development cycle,” says Frank Schirrmeister, Synopsys director of marketing for system-level solutions. “With our support of standards-based SystemC TLM-2.0 integrations with fast RTL emulation environments such as EVE ZeBu, Synopsys virtual prototyping products can extend the benefits of system-level visibility to development teams for hardware-software co-verification.”
“Adding support for TLM-2.0 gives software developers and hardware verification teams an interoperable way to easily map their SoC development environments to our emulators,” remarks Lauro Rizzatti, EVE-USA’s general manager and vice president of marketing. “It ties both ESL virtual platforms and simulation environments more closely to ZeBu and to each other, providing a standards-based methodology to reuse components for software development, hardware verification and hardware/software co-verification.”
The TLM-2.0 transactor adapter is compatible with the OSCI TLM-2.0 standard, supporting multiple targets and initiators, blocking and non-blocking transport interfaces, and the Loosely Timed (LT), Loosely Timed Temporal Decoupled (LTD) and Approximately-Timed (AT) coding styles.
At the system level, users can integrate the TLM-2.0 transactor adapter with Electronic System Level (ESL) virtual platforms, as well as with advanced SystemVerilog hardware verification environments. At the emulator level, the ZeBu TLM-2.0 transactor adapter is an open architecture that enables interoperability with other ZeBu transactors, either from EVE’s transactor catalog or created using ZEMI-3.
EVE will demonstrate its support for TLM-2.0 in Booth #510 at the 47th Design Automation Conference (DAC) June 14-16 at the Anaheim Convention Center in Anaheim, Calif.
About EVE
EVE is the worldwide leader in hardware/software co-verification solutions, offering fast transaction-based co-emulation and in-circuit emulation, with installations at nine of the top 10 semiconductor companies. EVE products shorten the overall verification cycle of complex integrated circuits and electronic systems designs. Its products can be integrated with transaction-level ESL tools and software debuggers, target hardware systems, as well as Verilog, SystemVerilog and VHDL simulators. EVE is a member of ARM, Mentor Graphics, Real Intent, Springsoft and Synopsys Partner programs. Its United States headquarters are in San Jose, Calif. Telephone: (408) 457-3200. Facsimile: (408) 457-3299. Corporate headquarters are in Palaiseau, France. Telephone: (33) 1 64.53.27.30. Fax: (33) 1 64.53.27.40. Email: info@eve-team.com. Website: www.eve-team.com.
|
Related News
- EVE's ZeBu Hardware-Assisted Verification Platform Used by Konica Minolta to Implement SystemVerilog Assertions
- EVE's Hardware-Assisted Verification Platform Accelerates Embedded Software Development for Texas Instruments' OMAP 5 Platform
- EVE Unveils ZeBu-Blade2 Hardware-Assisted Verification Platform
- EVE, Xena Networks Link Hardware-Assisted Verification Platform with Ethernet Testing Solution
- Reference Virtual Platform of ARM Model Running Linux Under SystemC/TLM-2.0 Released by Open Virtual Platforms (OVP)
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |