Freescale extends QorIQ family with quad-core P3 platform optimized for low power
Pin-compatible with P4 and P5 platforms, new P3 processor leverages advanced P4080 features and widens QorIQ performance ranges
ORLANDO, Florida (Freescale Technology Forum) – June 22, 2010 – Freescale Semiconductor is expanding the performance range of its QorIQ™ communications processor product lines with the introduction of the quad-core QorIQ P3 platform. The new P3041 processor offers an advanced feature set leveraging Freescale’s P4 platform technology and optimized for low power, enabling increased system performance and improved overall power consumption.
The new QorIQ P3041 expands the reach of Freescale’s P4 platform into lower power applications. Manufactured in 45nm silicon-on-insulator process technology, the P3041 offers optimal integration and new intellectual property that delivers improved functionality for end products. The P3041 processor integrates four e500mc cores based on Power Architecture® technology running up to 1.5 GHz at less than 12 watts, and delivers about 2.5 DMIPS/MHz. Key features include a three-level cache hierarchy for optimized latencies, a hardware hypervisor for robust support of multiple operating systems within the device, a trusted boot architecture to ensure code is not tampered with or reverse engineered, efficient data path handling, and improved Serial RapidIO and SATA IP.
“The P3 platform rounds out the first generation of QorIQ platforms with multicore products that deliver outstanding performance within extremely aggressive power envelopes,” said Brett Butler, vice president and general manager of Freescale’s Networking Processor Division. “Freescale’s customers now have a comprehensive multicore portfolio spanning from ultra-low power dual-core processors, 12 watt quad-core devices, a highly advanced eight core offering and even 64-bit solutions that deliver 2.2 GHz within 30 watts.”
The P3041 is pin-compatible with Freescale’s QorIQ P4080, P4040, P5020 and P5010 products and shares the same advanced architecture as these high-end devices. As a result, products in the P3, P4, and P5 families are software compatible, enabling easy migration across a range of applications, from mid-range mixed control/data plane applications on the P3041, to high-end data plane on the P4080, to high-end control plane with the P5020.
The P3041 also integrates new IP to deliver improved functionality for mixed control/data plane applications. SATA 2.0 controllers allow connection of hard drives for applications that need to store data onboard the system, and improved Serial RapidIO controllers (v1.3 + 2.1) allow enhanced Type 9 and 11 messaging for base stations and defense applications. Dual high-speed USB 2.0 with integrated PHYs also help to reduce overall BOM cost and board space.
The P3 family targets mixed control plane and data plane applications, leveraging a hardware hypervisor and its capability to safely provision flexible core allocations including: groups of cores running SMP, cores running independent or serial applications, cores running in parallel, or cores running end-user applications. Examples of these approaches include:
- Integrated Access Routers (IAD): Dual SATA ports provide high-speed, low-cost storage options for statistics or large databases. Compared to SGMII, P3041’s support for 2.5Gb/s Ethernet enables the next step in performance connectivity to switches.
- Base Station Network Interface Cards (NIC): Dual Serial RapidIO ports up to 5 GHz can be used for redundancy or multiple connections, both to the backplane or to the DSP farm. With improved Type 11 messaging and new support for Type 9 data streaming, the Serial RapidIO interconnect can be used not only as a control plane interface, but can also achieve its intended potential as an efficient replacement of Ethernet as data plane interface.
QorIQ P3 product features
- Quad e500mc cores based on Power Architecture technology to 1.5 GHz frequency
- 3-level cache hierarchy with 128kB backside L2 per core and 1MB shared L3
- Hardware hypervisor
- CoreNet switch fabric
- Memory controller
- DDR3/3L SDRAM up to 1.3GHz
- 32/64 bit data bus w/ECC
- XAUI + 5x Gigabit Ethernet including RGMII, SGMII and 2.5Gb/s SGMII
- Up to 4 PCI Express 2.0 to 5GHz
- Dual SRIO (1.3 + 2.1) to 5GHz
- Dual SATA 2.0
- Dual USB 2.0 with integrated PHY
- High-speed Aurora debug port
- Power: less than 12W
Comprehensive ecosystem
Supporting software solutions are expected to be available from a broad set of ecosystem partners including Enea®, Green Hills®, Mentor Graphics®, Wind River®, CodeSourcery™, QNX® and others.
Availability
The P3041 communications processor is scheduled to begin sampling in Q4 2010 with qualification planned for 2H 2011.
About QorIQ communications platforms
Freescale QorIQ communications platforms are the next-generation evolution of Freescale’s leading PowerQUICC communications processors. Built using high-performance Power Architecture cores, Freescale QorIQ platforms enable a new era of networking innovation where the reliability, security and quality of service for every connection matters. The Freescale QorIQ platforms and roadmap consist of five platforms (P1, P2, P3, P4 and P5) that include single-, dual- and many cores to offer customers a choice of solutions, whether they are ready to move to multicore today or want a smart migration path to get there in the future. For more information about QorIQ platforms, visit www.freescale.com/multicore.
About Freescale
Freescale Semiconductor is a global leader in the design and manufacture of embedded semiconductors for the automotive, consumer, industrial and networking markets. The privately held company is based in Austin, Texas, and has design, research and development, manufacturing or sales operations around the world. www.freescale.com.
|
Related News
- Mentor Graphics Announces Commercial Linux Platform for Freescale Semiconductor's Processors Based on Power Architecture Technology; Support for New QorIQ P3 and P5 Platform
- Lattice Extends Low Power Leadership with New Lattice Avant FPGA Platform
- Mentor Graphics Announces Embedded Linux Platform Support for Freescale Semiconductor's Most Advanced QorIQ Family of Multi-threaded 64-bit Processors
- Actel Ices Competition With New Low-Power, I/O-Optimized FPGA Family
- Ceva Bluetooth Low Energy and 802.15.4 IPs Bring Ultra-Low Power Wireless Connectivity to Alif Semiconductor's Balletto Family of MCUs
Breaking News
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PiMCHIP Deploys Ceva Sensor Hub DSP in New Edge AI SoC
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
Most Popular
- DENSO and U.S. Startup Quadric Sign Development License Agreement for AI Semiconductor (NPU)
- Xiphera and Crypto Quantique Announce Partnership for Quantum-Resilient Hardware Trust Engines
- Arm's power play will backfire
- Alchip Announces Successful 2nm Test Chip Tapeout
- Faraday Unveils HiSpeedKit™-HS Platform for High-speed Interface IP Verification in SoCs
E-mail This Article | Printer-Friendly Page |