Ceva-Waves Bluetooth 5.3 Low Energy Baseband Controller, software and profiles
Tensilica HiFi Audio DSP Becomes First IP Core Approved for Dolby MS10 Multistream Decoder
Update: Cadence Completes Acquisition of Tensilica (Apr 24, 2013)
SANTA CLARA, Calif. - June 23, 2010 -Tensilica, Inc. today announced that it is the first IP (intellectual property) company with an audio core for system-on-chip (SOC) designs approved for using the Dolby MS10 Multistream Decoder, a multi-format audio decoding technology, that supports Dolby Digital Plus and Dolby Pulse in a single package for next-generation HDTVs (high-definition televisions), STBs (set-top boxes) and DMPs (digital media players).
The Dolby MS10 Multistream Decoder is critical to next-generation designs because it enables viewers to receive content not only from traditional broadcast and operator sources, but also from the Internet, USB devices, game consoles, and PCs. This array of source content uses a corresponding array of audio codecs, which Dolby has consolidated into MS10.
The Dolby MS10 Multistream Decoder decodes Dolby Digital Plus, Dolby Digital, Dolby Pulse, HE AAC, and all AAC bitstreams. For compatibility with the worldwide base of existing home theater systems, it enables the decoded audio streams to be transcoded into a Dolby Digital audio output bitstream for multichannel surround, stereo, and mono sound.
"Tensilica's leading system OEM and semiconductor customers are already developing next generation DTV, STB and DMP SOCs to support MS10," stated Larry Przywara, Tensilica's director of multimedia marketing. "The Dolby MS10 Multistream Decoder provides our customers with a single-license universal decoder that reduces the codec integration complexity and cost to support the broadcast audio technologies in Europe, North America and many other geographies. By being the first IP company to pass this certification, we are providing our customers with a significant head start."
"Once again, Tensilica has shown leadership and a commitment to its customers by enabling support for great Dolby sound," said Jason Power, Senior Director, Broadcast Segment, Dolby Laboratories. "As more HDTV and STB manufacturers begin to develop products based on the Dolby MS10 Multistream Decoder, its availability on Tensilica's HiFi Audio DSP can help speed the development of new products that deliver unparalleled audio."
Tensilica's HiFi 2 and HiFi EP Audio DSPs are fully programmable processor cores optimized for audio applications, with a library of over 60 of the most popular audio software packages. Other Dolby certified packages include: Dolby Digital Decode, Dolby Digital Creator Encode, Dolby Digital Compatible Output Encode, Dolby Digital Plus 5.1 and 7.1-channel Decode, Dolby True HD Decode and Dolby Pro Logic IIx.
About Tensilica
Tensilica, Inc. is the leader in customizable dataplane processor IP cores. Dataplane Processor Units (DPUs) combine the best capabilities of CPUs and DSPs while delivering 10 to 100x the performance because they can be customized using Tensilica's automated design tools to meet specific signal processing performance targets. Tensilica's DPUs power SOC designs at system OEMs and six out of the top 10 semiconductor companies for products including mobile phones, consumer electronics devices (including digital TV, Blu-ray Disc players, broadband set top boxes, digital still cameras and portable media players), computers, and storage, networking and communications equipment. For more information on Tensilica's patented, benchmark-proven DPUs visit www.tensilica.com.
|
Related News
- Cadence Tensilica HiFi Audio DSP Becomes First IP Core Approved for Dolby MS12 Multistream Decoder
- Dolby MS12 Multistream Decoder Now Supported and Approved on CEVA's Audio DSP
- Cadence Tensilica HiFi DSP Offers First processor IP Approved for Dolby AC-4 Decoder
- Tensilica HiFi 2 Audio DSP Supports aacPlus by Dolby in Digital Audio Broadcasting Plus (DAB+) Decoder
- Cadence Tensilica HiFi DSP Enables Highly Energy-Efficient Audio Playback for Dolby Atmos for Cars
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |