English
Silicon Library Inc. develops SD UHS-II PHY MACRO
August 20, 2010 -- Silicon Library Inc. develops SD UHS-II PHY Macro. SLI ZRSLSIPSDUHS2PHY is PHY IP solution for UHS-II interface that SD Association is working on the standardization as the new ultra high speed interface for both SDHC and SDXC.
By using SLI's unique SerDes technology, ZRSLSIPSDUHS2PHY achieves 300MB/s that is the maximum speed for UHS-II with the low power consumption.
This PHY IP can be applied to both the device and host sides including SDIO and hence it can be utilized for SOCs for various applications including SD cards, digital cameras, digital videos, digital TVs, media players and personal computers.
|
||||||
Related News
- Arasan to demonstrate its SD Card UHS-II PHY IP and eMMC 5.1 PHY IP for 12nm SoC Designs at the 2019 Flash Memory Summit
- Arasan to demonstrate its SD Card UHS-II PHY IP and eMMC 5.1 PHY IP for 12nm SoC Designs at the 2018 Flash Memory Summit
- Arasan Announces SD Card UHS-II PHY IP for 12nm SoC Designs
- Enhance your SD Card experience by integrating SD 4.1 UHS-II PHY IP Core to achieve Ultra High Speeds
- Arasan Announces Advanced Process Nodes for High Performance SD Card UHS-II Physical Layer Interface
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
|
E-mail This Article | 
|
|
Printer-Friendly Page |