TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries, multiple metalstacks
Magma Announces Quartz iPOP Initiative -- Delivers "Improved Productivity, Operability and Performance" for Faster, Higher Capacity Physical Verification
Program Offers New Licensing Model to Improve Return on Investment for Physical Verification Flows
SAN JOSE, Calif., Aug. 23, 2010 -- Magma® Design Automation Inc. (Nasdaq:LAVA), a provider of chip design software, today launched Quartz iPOP, the "improved Productivity, Operability and Performance" initiative to facilitate designers' adoption of the Quartz™ DRC and Quartz LVS software for designs targeted at 65 nanometers (nm) and below. Magma's Quartz products, the first truly scalable physical verification solutions, handle larger designs and provide turnaround time up to an order of magnitude faster than traditional solutions – without sacrificing accuracy or requiring additional hardware. These unique capabilities provide the improved productivity and performance necessary to cope with the higher verification burden for designs at 65 nm and smaller without increasing the physical verification budget.
"The proportion of design activity at smaller geometries continues to increase. Just to maintain the same level of productivity means the physical verification needs to get faster," said Anirudh Devgan, general manager of Magma's Custom Design Business Unit. "Because the Quartz line is the only set of products that is fully scalable, it's the best verification option as design geometries shrink."
Foundry Report: 40-nm Wafer Shipments up 30 Percent
In its second quarter 2010 earnings report, TSMC revealed that 43 percent of its revenue comes from its 65- and 40-nm process nodes, and the number of 40-nm wafer shipments increased by 30 percent over the previous quarter. The adoption rate of advanced process nodes is accelerating, and many wireless, networking, graphics and other high-volume semiconductor companies have already migrated to 65-nm and smaller process technologies.
Faster, Higher Capacity Physical Verification Required at 65-nm and Below
The number of transistors that can be placed on an integrated circuit doubles approximately every 2 years – consistent with the predictions of Moore's Law. At 65 nm and below, the rule complexity and number of rules increase significantly. As a result, the cost of hardware and software, along with the runtime required for physical verification may quadruple as customers move to each new process node. At 65 nm and below, traditional physical verification solutions fail to meet capacity, turnaround time and accuracy requirements.
"At 65-nm and below, IC size and design rule complexity make physical verification an even tougher, time-consuming challenge – frequently pushing chip delivery past acceptable deadlines," Devgan said. "With easy access to Quartz DRC and Quartz LVS through the Quartz iPOP program, designers targeting 65-nm and smaller processes can experience firsthand the tremendous time- and cost-saving advantages of the industry's fastest, fully scalable physical verification solution."
Quartz iPOP: Better ROI, New Licensing Model and Free Trial of Quartz DRC and Quartz LVS
The iPOP program is designed to demonstrate the superior productivity and performance delivered by Magma's Quartz DRC, Quartz LVS and Talus® qDRC physical verification solutions, and to ease adoption of the Quartz product the iPOP program features a new licensing model that enables designers to increase the return on investment (ROI) in Magma's physical verification tools.
The Quartz products have been proven to provide sign-off quality results across a wide range of customers, design styles and process nodes. Quartz DRC and Quartz LVS enjoy broad foundry support and can be used for sign-off or in conjunction with third-party physical verification tools. Users of Magma's Talus IC implementation system can achieve additional improvements in turnaround time and predictability with Talus qDRC, which provides Sign-off in the Loop™ physical verification. Unlike traditional tools, Talus qDRC runs during placement and routing to immediately identify and correct design rule violations, allowing Talus to generate sign-off-clean designs.
In addition to a new licensing model, the iPOP program features a free trial of the Quartz DRC and Quartz LVS software and an online quiz that lets designers demonstrate their knowledge of physical verification and enter into a monthly drawing for an Apple iPad. Designers can request the Quartz software evaluation and take the quiz by visiting www.magma-da.com/QuartziPOP. Only current and prospective Magma customers are eligible to win. No purchase necessary to enter, play or win. A purchase will not improve chances of winning.
About Magma
Magma's electronic design automation (EDA) software provides the "Fastest Path to Silicon"™ and enables the world's top chip companies to create high-performance integrated circuits (ICs) for cellular telephones, electronic games, WiFi, MP3 players, digital video, networking and other electronic applications. Magma products are used in IC implementation, analog/mixed-signal design, analysis, physical verification, circuit simulation and characterization. The company maintains headquarters in San Jose, Calif., and offices throughout North America, Europe, Japan, Asia and India. Magma's stock trades on Nasdaq under the ticker symbol LAVA. Visit Magma Design Automation on the Web at www.magma-da.com.
|
Related News
- Magma's Quartz Physical Verification Software Used by TSMC on Complex 28-nm Product Qualification Vehicle Test Chip -- Delivers Sign-Off Accuracy Along With Required Performance and Capacity
- Synopsys Delivers Industry's First USB 3.2 Verification IP and Test Suite for Higher Performance USB Designs
- New Release of Synopsys Synplify Software Delivers Up to 3X Faster Runtime with Higher FPGA Performance
- Mentor Graphics Enterprise Verification Platform Delivers New Levels of Performance and Low Power Verification Productivity
- Magma's Titan Delivers Higher Quality and Faster Design Convergence for Analog IP
Breaking News
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PiMCHIP Deploys Ceva Sensor Hub DSP in New Edge AI SoC
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
Most Popular
- DENSO and U.S. Startup Quadric Sign Development License Agreement for AI Semiconductor (NPU)
- Xiphera and Crypto Quantique Announce Partnership for Quantum-Resilient Hardware Trust Engines
- Arm's power play will backfire
- Alchip Announces Successful 2nm Test Chip Tapeout
- Faraday Unveils HiSpeedKit™-HS Platform for High-speed Interface IP Verification in SoCs
E-mail This Article | Printer-Friendly Page |