Magma Delivers Hierarchical Reference Flow for the Common Platform Alliance's 32/28-nm Low-Power Process Technology
RTL-to-GDSII Flow Used to Successfully Implement 32/28-nm Chip
SAN JOSE, Calif., Aug. 31, 2010 -- Magma® Design Automation (Nasdaq:LAVA), today announced the availability of a proven hierarchical RTL-to-GDSII reference flow for the Common Platform™ alliance's 32/28nm low-power process technology. This automated, comprehensive solution provides predictable results and reduces development costs for 2-million-instance and larger systems on chip (SoCs) that are manufactured at this advanced process node.
The hierarchical reference design was implemented using Magma's full RTL-to-GDSII flow and the ARM 32/28-nm LP process libraries; standard cells, memory compilers and GPIO. This successful design implementation demonstrates that the flow provides key capabilities required to build multi-Vdd low-power SoCs, validates tool and library interoperability and facilitates rapid user adoption through the inclusion of a sample design which can be accessed from Magma or the Common Platform alliance.
This integrated hierarchical RTL-to-GDSII reference flow is based on Magma's Talus® 1.1, Hydra™ and Talus Power Pro, providing a comprehensive low-power hierarchical solution. Talus 1.1 is an integrated RTL-to-GDSII implementation solution that performs timing optimization concurrently during routing – rather than sequentially before and after place and route – providing faster overall design closure with better performance and predictability. Hydra is a hierarchical design planning solution for large systems on a chip (SoCs) and features out-of-the-box reference flows for enhanced ease of use and faster delivery of better floorplans. Talus Power Pro supports power optimization techniques required in low-power designs, including multiple voltage domains, which enable the optimal tradeoff between performance, area and power, and clock gating for dynamic power reduction. Talus Power Pro supports both the UPF and CPF standards for power intent.
"The Common Platform alliance 32/28-nm process with Gate First High-k Metal Gate (HKMG) technology maximizes power efficiency and transistor scaling while minimizing die size and design complexity," said Andy Brotman, vice president of Design Infrastructure at GLOBALFOUNDRIES. "By partnering with Magma to develop and deliver this reference flow, we enable our mutual customers to quickly take full advantage of leading software and advanced process technology to get the best results and time to market for their advanced designs."
"Magma software is specifically architected to address the complexity, size and power requirements of multimillion-gate ICs targeted at advanced nodes," said Premal Buch, general manager of Magma's Design Implementation Business Unit. "The Magma-Common Platform alliance reference flow will provide designers with additional confidence in their ability to successfully meet the power, performance and turnaround time goals of advanced ICs."
Magma will feature its reference flows for the Common Platform alliance 32/28-nm LP and 65-nm LPe processes at GLOBALFOUNDRIES' Global Technology Conference on Sept. 1, 2010 in Santa Clara. For more information about GTC 2010, please visit: www.globalfoundries.com/gtc2010/.
Availability
The reference flow is available upon request from IBM, Samsung Electronics, GLOBALFOUNDRIES and Magma.
About the Common Platform
IBM, Samsung Electronics and GLOBALFOUNDRIES have forged a unique manufacturing collaboration, featuring 28-nm, 32-nm, 45-nm, 65-nm and 90-nm process technologies. By combining the expertise and research resources of all three companies and leveraging advances such as high-k metal gate technology, 193-nm immersion lithography and ultralow-k dielectrics, the Common Platform technology collaboration is able to accelerate the availability of leading-edge technology to foundry customers. The Common Platform model is supported by a comprehensive design-enablement ecosystem, enabling foundry customers to easily source their chip designs to multiple 300-mm foundries with minimal design work and with unprecedented flexibility and choice.
About Magma
Magma's electronic design automation (EDA) software provides the "Fastest Path to Silicon"™ and enables the world's top chip companies to create high-performance integrated circuits (ICs) for cellular telephones, electronic games, WiFi, MP3 players, digital video, networking and other electronic applications. Magma products are used in IC implementation, analog/mixed-signal design, analysis, physical verification, circuit simulation and characterization. The company maintains headquarters in San Jose, Calif., and offices throughout North America, Europe, Japan, Asia and India. Magma's stock trades on Nasdaq under the ticker symbol LAVA. Visit Magma Design Automation on the Web at www.magma-da.com.
|
Related News
- Magma Delivers Hierarchical Reference Flow for the Common Platform Alliance's 32/28-nm Low-Power Process Technology
- Cadence Introduces 32/28-Nanometer Low-Power RTL-to-GDSII Silicon Realization Reference Flow for Common Platform Alliance
- SMIC and Magma Announce Availability of Enhanced Reference Flow for SMIC's 90-Nanometer Low-Power Process
- Uniquify's LPDDR4 Super Combo IP Delivers 3200Mbps Performance in 28nm Low-Power Process Node
- SMIC and Synopsys Deliver 28-nm HKMG Low-Power Reference Flow
Breaking News
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PiMCHIP Deploys Ceva Sensor Hub DSP in New Edge AI SoC
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
Most Popular
- DENSO and U.S. Startup Quadric Sign Development License Agreement for AI Semiconductor (NPU)
- Xiphera and Crypto Quantique Announce Partnership for Quantum-Resilient Hardware Trust Engines
- Arm's power play will backfire
- Alchip Announces Successful 2nm Test Chip Tapeout
- Faraday Unveils HiSpeedKit™-HS Platform for High-speed Interface IP Verification in SoCs
E-mail This Article | Printer-Friendly Page |