Xilinx Demonstrates Intel(R) QuickPath Technology for FPGAs at Intel Developer Forum
Implementation of Intel(R) QuickPath Interconnect Running on High Performance Virtex FPGAs
SAN JOSE, Calif., Sept 16, 2010 -- Xilinx, Inc. (Nasdaq: XLNX) today showcased at the Intel Developer Forum the Intel(R) QuickPath Interconnect (Intel(R) QPI) technology for enabling the integration of Field-Programmable Gate Arrays (FPGA) in high performance computing applications. The demonstration shows how high-performance Virtex FPGAs can support the low latency and memory coherency benefits of Intel(R) QPI when paired with Intel(R) Xeon(R) processors in HPC systems.
"The tremendous processing horsepower in Xilinx FPGAs has enabled its increased usage in Accelerator and Offload Engine applications. This coupled with their traditional strength in chip interfacing, given our flexible serial and parallel IO technology, allows Xilinx to support a broad range of acceleration architectures," said Amit Dhir, senior director of Aerospace, Defense and High-Performance Computing at Xilinx. "By working with Intel to deliver a solution that supports the Intel(R) QPI protocol, we can simultaneously leverage the FPGA processing power and the improved bandwidth, latency and coherency capabilities of Intel(R) QPI to enable more advanced accelerator subsystems in next generation HPC systems that are based on Xilinx FPGAs and Intel(R) Xeon(R) processors."
Xilinx FPGAs support a multitude of high speed parallel and serial connectivity standards and when applied as co-processors can significantly accelerate high performance scientific, oil and gas, financial, aerospace and defense, communications, networking, and life sciences computing applications. Utilizing Intel(R) server platforms and Intel(R) QPI gives customers the highest performance and flexibility to accelerate their HPC application workloads.
"Using Intel(R) QPI in-socket accelerators will be able to provide the additional capability of keeping the data coherent with the processor memory, allowing many applications to benefit from new features like reduced latency to system memory, cache coherency, shared memory models and faster/wider serial interconnect to the Intel(R) Xeon(R) processors," said Allan Cantle, president and founder of Nallatech. "Xilinx's support for this technology means customers can take advantage of the features of Intel(R) QPI technology in high performance computing applications where FPGAs can significantly improve performance per watt per dollar."
About Virtex FPGAs
Optimized for applications that require high-speed serial connectivity and high-performance processing, Virtex FPGAs offer high levels of serial bandwidth to enable next-generation packet and transport, switch fabric, video switching, and imaging equipment. The Virtex FPGA architecture provides support to interface and run PCI Express(R) Gen1/Gen2/Gen3 and Intel QPI protocols. Support for these processor interfaces and protocols enables the computing applications running on FPGAs to interact with the processor and access the data required to accelerate the applications.
About Xilinx
Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit www.xilinx.com.
About Nallatech
Nallatech, a subsidiary of Interconnect Systems, Inc. (http://www.isipkg.com/), is a leading supplier of accelerator computing solutions. Nallatech designs and manufactures FPGA products for high performance computing applications and rugged embedded computing platforms. Customers benefit from lower costs, reduction in size, weight and power and improved performance. For further information, visit http://www.nallatech.com/, or call (805) 383-8997 (North America) or +44 1236 789 567 (Europe).
|
Xilinx, Inc. Hot IP
Related News
- Xilinx Demonstrates Industry's First QPI 1.1 Interface with FPGAs at Intel Developer Forum
- ASMedia Technologies Demonstrates Industry's First SuperSpeed USB 10 Gbps (USB 3.1) Silicon ASM1352R (USB3.1 to SATA6G with RAID) at Intel Developer Forum
- NEC Electronics Demonstrates Advanced, High-Speed Interconnect Technologies at Intel Developer Forum 2002
- Another Industry first: Extreme Networking- 1K TCP & UDP Session on intel/Xilinx FPGAs, high availability application performance - 2U Accelerator box with Linux iWARP/RoCE
- Xylon Unveils New Panoramic Multi-Sensor Camera Demo at Xilinx Developer Forum
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |