Altera Achieves Major Milestone in Addressing Industry's Bandwidth Demands by Demonstrating 25-Gbps Transceivers in Programmable Logic
Demonstration Video Offers Early Look at Transceiver Performance on 28-nm FPGAs
San Jose, Calif., September 20, 2010 — Altera Corporation (NASDAQ: ALTR) today announced it has achieved a significant milestone in transceiver technology by becoming the first company to successfully demonstrate 25-Gbps transceiver performance in programmable logic. Altera achieved this milestone in its 28-nm transceiver test chip, a prototyping platform that Altera is using to successfully deploy 28-Gbps transceivers on 28-nm FPGAs. Reaching the 25-Gbps milestone more than doubles the transceiver performance in currently available FPGA solutions, and rivals or exceeds the abilities of competitive ASSP offerings. A demonstration video of the 28-nm transceiver test chip is available for viewing on Altera's website.
Altera's 28-nm transceiver test chip provides insight into how high-performance transceiver designs behave on TSMC's leading-edge 28-nm high-performance (HP) process. Results of the test chip enable Altera to develop and apply optimization techniques for power, jitter and link performance in the production tape-out of Stratix® V FPGAs featuring 28-Gbps transceivers. Altera's Stratix V FPGAs are architected to serve markets that require very high performance at fixed cost and power budgets, such as military communications, optical transmission networks and emerging test equipment systems. Today, Altera is the only company shipping production FPGAs with transceivers operating at 11.3 Gbps, and being the first FPGA vendor to reach the 25-Gbps milestone further extends Altera's leadership in transceiver technology.
"Altera’s achievements with transceiver technology at 28-nm sets the bar high for the rest of the chip industry who are rapidly trying to support the next-generation of 4x25-Gbps high-density, low-power optical modules," said Christian Urricariet, director of marketing for high-speed optics at Finisar. "Together, Altera and Finisar are leading the way to bringing high-bandwidth, low-cost optical communications to the market which will inevitably change the way datacenters are designed and architected."
"The industry's move to 28-Gbps transceivers enables next-generation broadband networks to address the demand for increasing bandwidth while maintaining form factor, cost and power constraints," said Luanne Schirrmeister, senior director of product marketing at Altera Corporation. "The results we demonstrated on our 28-nm transceiver test chip clearly show Altera is on the forefront of this evolution and we are on target to achieve 28-Gbps on our 28-nm FPGAs. Our ability to provide these high-performance, low-power transceivers is a direct result of the close collaboration between Altera and TSMC and the use of TSMC's 28-nm HP process, which offers an ideal choice for devices used in next-generation, high-bandwidth systems."
28-nm Transceiver Test Chip Demonstration Video
A demonstration video showing Altera's 28-nm transceiver test chip running a pseudo-random bit pattern at 25 Gbps is currently available on Altera's website at www.altera.com. The demonstration video also includes a look at both transmit and receive eye diagrams across a 10GBASE-KR backplane running at 10.3 Gbps.
About Altera
Altera® programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera's FPGA, CPLD and ASIC devices at www.altera.com.
|
Intel FPGA Hot IP
Related News
- Altera Shipping Industry's Fastest Backplane-capable Transceivers in 28-nm Stratix V FPGAs
- Altera Starts Production Shipments of the Industry's First FPGAs with Integrated 11.3-Gbps Transceivers
- Intilop's 10G Full TCP Accelerators with Network Security Features IP Core for Altera/Intel FPGAs qualified by major University and Government clients
- Microsemi Collaborates with Silicon Creations to Enable Industry's Lowest Power FPGA 12.7G Transceivers With PHYs for Microsemi's PolarFire FPGAs
- Altera Programmable Logic is Critical DNA in Software Defined Data Centers
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |