7 µW always on Audio feature extraction with filter banks on TSMC 22nm uLL
Project maps ARM core variability at 32-nm
Peter Clarke, EETimes
9/21/2010 7:11 AM EDT
LONDON – A European collaborative research project has spent 2.5 years and 4.45 million euro (about $5.8 million) performing a characterization of an ARM926 core for the statistical variability that is inherent at the 32-nm manufacturing process node.
The project, called Reality for short and "Reliable and variability tolerant system-on-a-chip design in more-moore technologies" in full, was set up in 2008 to address issues around design for variability, which becomes increasingly significant at geometries below 32-nm.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related News
- ARM boost in $100bn Stargate data centre project
- Cadence Library Characterization Solution Accelerates Delivery and Enhances Quality of Arm Memory Products
- Cadence Library Characterization Solution Accelerates Delivery and Enhances Quality of Arm Memory Products
- Yocto Project Welcomes New Members, Advances Open Source Embedded Systems Through Momentum
- Arm Drives Smart Utilities for KEPCO's Behind the Meter Project
Breaking News
- Siemens delivers certified and automated design flows for TSMC 3DFabric technologies
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results