TransEDA to demo VN-Cover and VN-Check at EDA Front-to-Back conference, November 13-15
TransEDA to demo VN-Cover and VN-Check at EDA Front-to-Back conference, November 13-15
LOS GATOS, Calif. - November 12, 2001 - TransEDA® PLC (LSE: TRA), the leader in ready-to-use verification solutions, is a supporting sponsor of the first EDA Front-to-Back conference, November 13-15 at the San Jose Convention Center. TransEDA will be offering "Test Drives" of the latest versions of its coverage analysis, test suite analysis and HDL checking solutions, providing attendees a hands-on demo of TransEDA's leading tools in a classroom setting under the guidance of an expert instructor. Test Drives, offered during show hours on November 14 and 15, are free for conference attendees and can be scheduled in advance at the conference web site www.edafronttoback.com. Show attendees will also be able to get walk-up demonstrations at the TransEDA booth during exhibit hours on November 14 and 15.
On Tuesday November 13, from 11:00 AM to 12:00 PM, Scott Winick, TransEDA Director of System Level Verification, will lead a conference session entitled "Pre-Silicon Validation" in room FV02. This session will outline TransEDA's approach to functional verification with an emphasis on automating system level verification using test automation and intelligent bus functional models.
About TransEDA
TransEDA PLC (LSE: TRA) develops and markets ready-to-use verification solutions for electronic field-programmable gate array (FPGA), application-specific integrated circuit (ASIC), and system-on-chip (SoC) designs. The company's verification IP library includes models for advanced microprocessors and bus interfaces. TransEDA's design verification software performs application-specific test automation; configurable HDL checking; functional, finite state machine (FSM) and code coverage analysis; and test suite analysis. TransEDA's tier-1 list of customers includes 18 of the world 's top 20 semiconductor vendors. For more information, visit www.transeda.com or contact TransEDA at 983 University Avenue Building C, Los Gatos, California 95032 U.S.A., telephone (408) 335-1300, fax (408) 335-1319, email info@transeda.com.
Note: TransEDA and Verification Navigator are registered trademarks, and VN-Cover, VN-Check, VN-Control, and Foundation Models are trademarks of TransEDA. All other trademarks are properties of their respective holders.
Related News
- TransEDA Announces VN-Cover New Coverability Analysis Option to Guide Users to Full Coverage
- Mentor Graphics Announces TransEDA VN-Cover Emulator Support for Celaro and VStation Systems
- TransEDA’s VN-Cover Emulator Now Available for the Quickturn Palladium Design Verification System
- TransEDA Introduces VN-Cover Simulation Farm Bundle for Faster Design Verification at 80 Percent Savings
- Intrinsic ID Looks Back on 15 Years of Building Digital Trust
Breaking News
- Strategies for Addressing More Complex Custom Chip Design
- M31 Technology - AI-Powered Automotive Dual Engines and 2nm Technology Boost Revenue to Record Highs
- EnSilica Agrees a Multimillion Pound Design and Manufacturing Services Contract
- Brite Semiconductor Releases DDR3/4, LPDDR3/4 Combo IP
- SoCs Get a Helping Hand from AI Platform FlexGen
Most Popular
- SoftBank Group to Acquire Ampere Computing
- Synopsys Accelerates Chip Design with NVIDIA Grace Blackwell and AI to Speed Electronic Design Automation
- Zero ASIC launches world's first open standard eFPGA product
- Global Top 10 IC Design Houses See 49% YoY Growth in 2024, NVIDIA Commands Half the Market, Says TrendForce
- Menta Unveils 'Launch Pad' Low-Cost Embedded FPGA (eFPGA) Technology Access Program For Defense And Aerospace Customers
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |