Lattice MachXO2 PLD Family Sets New Standards for Low Cost, Low Power Designs
Up to 30% Lower Cost, Over 100X Power Reduction Highlight New Benefits for Low-Density PLD Designers
HILLSBORO, OR, Nov 08, 2010 -- Lattice Semiconductor Corporation (NASDAQ: LSCC) today unveiled its new MachXO2(TM) PLD family, which offers designers of low-density PLDs an unprecedented mix of low cost, low power and high system integration in a single device. Built on a low power 65-nm process featuring embedded Flash technology, the MachXO2 family delivers a 3X increase in logic density, a 10X increase in embedded memory, more than a 100X reduction in static power and up to 30% lower cost compared to the MachXO(TM) PLD family. In addition, several popular functions used in low-density PLD applications, such as User Flash Memory (UFM), I2C, SPI and timer/counter, have been hardened into the MachXO2 devices, providing designers a "Do-it-All-PLD" for high volume, cost sensitive designs.
A video demonstration of the MachXO2 PLD Family can be viewed here:
- English -- http://www.latticesemi.com/xo2videoen
- Chinese -- http://www.latticesemi.com/xo2videocn
- Japanese -- http://www.latticesemi.com/xo2videojp
"Through the use of 65-nm embedded Flash technology, we have reduced costs and increased functionality for our traditional customers in the computing, industrial and telecommunication infrastructure markets, while dramatically reducing power consumption for designers of consumer equipment," said Gordon Hands, Director of Marketing for Low Density and Mixed Signal Solutions. "Many early access customers are already evaluating and designing with MachXO2 devices in a broad range of applications."
Three Product Options For Maximum Flexibility The MachXO2 family offers three options for maximum flexibility. MachXO2 ZE devices range from 256 to 7K look-up tables (LUTs), operate off a nominal 1.2V power supply, and support system performance up to 60MHz. With power specified as low as 19uW and packages as small as 2.5mmx2.5mm, the MachXO2 ZE devices are optimized for cost-sensitive, low power consumer design applications such as smart phones, GPS devices and PDAs.
MachXO2 HC devices range from 256 to 7K LUTs, operate off a nominal 3.3V or 2.5V power supply, and support system performance up to 150MHz. Offering up to 335 user I/O and a robust design solution (instant-on, non-volatile, input hysteresis and single-chip), these devices are ideal for control applications in end markets such as telecommunications infrastructure, computing, industrial and medical equipment.
MachXO2 HE devices range from 2K to 7K LUTs, operate off a nominal 1.2V power supply and support system performance up to 150MHz. These devices are optimized for power sensitive system applications.
Reaction from Early Access Customers "For the last two years, we have used MachXO PLDs in our CCTV video over fiber optic multiplexers because they deliver compelling system integration benefits combined with a flexible and cost effective architecture," said Mr. Zhu Guangxin, Vice President of Engineering at Obtelecom. "For our next generation products, MachXO2 PLDs will enable us to provide more features to our customers at lower prices."
"We have been actively designing with MachXO2 devices and will be using them in our CNC (computer numerical control) products," said Mr. An Luping, R&D Manager at KND CNC Technique. "The unique system integration benefits of the MachXO2 family, such as hardened I2C / SPI functions and User Flash Memory, combined with low power consumption and attractive price points, allow us to use these devices as alternatives to high risk and expensive discretes, ASICs and ASSPs."
Free Design Tools and Free Reference Designs Accelerate Development Time Customers can start designing with MachXO2 devices today using Lattice Diamond(TM) v1.1 software, which can be downloaded for free from the Lattice website at http://www.latticesemi.com/latticediamond/downloads/
Existing ispLEVER(R) software users have the option to use the free ispLEVER v8.1 SP1 Starter software, downloadable from the Lattice web site, with an installed control pack. Visit http://www.latticesemi.com/starter.
In order to enable quick and efficient design and deployment of commonly used functions in system and consumer applications, more than 20 reference designs using MachXO2 devices can be downloaded for free from the Lattice website at http://www.latticesemi.com/referencedesigns.
In addition, Lattice plans to make available two development kits that accelerate the evaluation of MachXO2 devices. Details can be found at http://www.latticesemi.com/machxo2devkits.
Pricing and Availability
MachXO2 LCMXO2-1200ZE and LCMXO2-1200HC devices are now available as Alpha samples, with engineering sample devices scheduled to be available in December 2010 and production devices available in March 2011. Pricing for the LCMXO2-256ZE/HC TQFP100 is $0.75 and the LCMXO2-1200ZE/HC TQFP100 is $2.00, both in 500KU volume. All members of the MachXO2 family are expected to be shipping in production by the end of Q3 2011. For more information about the Lattice MachXO2 PLD family, visit http://www.latticesemi.com/machxo2.
About Lattice Semiconductor
Lattice is the source for innovative FPGA, PLD, programmable Power Management and Clock Management solutions. For more information, visit www.latticesemi.com
|
Related News
- Lattice Diamond 2.0 Software Unleashes Powerful Design Tools for the New Low Cost, Low Power LatticeECP4 FPGA Family
- New Reference Designs Enhance Embedded Function Block Of Lattice MachXO2 PLD Family
- Lattice Design Tools Provide Complete 8-Bit Microcontroller System Support for Cost Sensitive, Low Power PLD Applications
- Lattice Expands CrossLink-NX FPGA Family of Best-in-Class Low Power FPGAs for Smart and Embedded Vision Systems
- Lattice Ships First Samples of Low Cost, Low Power LatticeECP4 FPGAs
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |