OCP-IP Announces Availability of New Memory Modeling White Paper
BEAVERTON, OR — November 29, 2010 — Open Core Protocol International Partnership (OCP-IP) today announced the availability of the white paper titled “A Memory Subsystem Model for Evaluating Network-on-Chip Performance”. This paper discusses performance characteristics of DRAM memories that affect NoC evaluation.
It provides a set of parameters that can be used to generate a highly abstracted DRAM controller and memory at an abstraction level high enough to make development easy, while still capturing those critical parameters that significantly influence system performance. The values of the parameters can be obtained from the JEDEC standards for the desired DRAM memory. Based on these values, the memory model can inject transaction-specific latencies. The model described enables system architects to get a more realistic picture of their system and thus helps design the NoC as part of the system as opposed to treating the NoC in isolation.
Work on the white paper was completed by the OCP-IP Network on Chip Benchmarking Working Group led by Tampere University of Technology and Sonics Inc.
“A goal of this white paper is to facilitate discussion of emerging requirements in SoC design and enable companies to explore NoC Benchmarking needs more closely resembling real, complex situations,” said Ian Mackintosh president and chairman of OCP-IP. “OCP-IP has brought together leading experts in this emerging field to develop schemes for evaluation of NoC performance that will ultimately help the SoC design industry and our members select and evaluate commercial products as they become available.”
The Network on Chip Benchmarking Working Group has also issued an open call for Benchmarks to be distributed to researchers. NoC researchers may submit benchmarks from any application domain to be included. For more information on the call for benchmarks, please see http://www.ocpip.org/ocpspec_call_for_benchmarks.php
To download a copy of the Memory Modeling White Paper click here
Companies or Universities wishing to participate in the OCP-IP Network on Chip Benchmarking Working Group are invited to contact admin@ocpip.org
For the latest information on OCP-IP please see our newsletter at http://www.ocpip.org/newsletters.php
About OCP-IP
Formed in 2001, OCP-IP is a non-profit corporation promoting, supporting and delivering the only openly licensed, core-centric protocol comprehensively fulfilling integration requirements of heterogeneous multicore systems. The Open Core Protocol (OCP) facilitates IP core reusability and reduces design time, risk, and manufacturing costs for all SoC and electronic designs by providing a comprehensive supporting infrastructure. For additional background and membership information, visit www.OCPIP.org.
|
Related News
- OCP-IP Releases White Paper Profiling EEMBC MultiBench Programs in a 64 Core Machine
- Denali and OCP-IP Announce the availability of OCP Compliant Databahn Memory Controller Cores
- OCP-IP Delivers Memory Model Package
- OCP-IP Develops New Relaxed Commercial Use License for SystemC Transaction Level Modeling Kit
- OCP-IP Provides Virtual Platform Leveraging Advanced OCP SystemC TLM Modeling Kit
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |