Physware Names Former Synopsys CTO Raul Camposano as CEO
Company Expands Leadership Role in Scalable and Parallel System Simulation
MOUNTAIN VIEW, CA. – November 30, 2010 – Physware, a leading provider of scalable and parallel solutions for Signal Integrity (SI), Power Integrity (PI), Electromagnetic Interference (EMI) and Simultaneous Noise Integrity (SNI), today announced the appointment of Dr. Raul Camposano as Chief Executive Officer.
Before joining Physware, Dr. Camposano held several senior roles in industry and in academia, both in the United States and Germany. He was CTO, senior vice president and general manager for over 10 years at Synopsys. After Synopsys, he served as CEO of Xoomsys. Dr. Camposano is active in the EDA professional community, serving on various boards, technical program committees and editorial boards worldwide. He has published over 70 articles and three books on electronic design automation and was elected a fellow of the IEEE in 1999. Dr. Camposano holds an M.S. from the University of Chile and a Ph.D. in computer science from the University of Karlsruhe.
"Physware is the right technology at the right time,” said Dr. Camposano. “Harnessing the massive computing power of the cloud to effectively scale 3D electromagnetic simulation to run very large designs is the future of 3DIC, package and board design. I'm excited to join this outstanding team.”
"I am delighted that someone with Raul’s industry experience and stature sees the potential of our technology,” said Greg Gottesman, board member of Physware and Managing Director of Madrona Venture Group. “I can't think of a better person to lead our company through the coming period of growth.”
Physware technology leverages the ongoing trend towards pervasive parallel computing, in particular multi-core CPUs and Cloud Computing. The company’s patent-pending, physics-aware technology tightly couples analysis and design methods to the underlying Maxwell’s and circuit equations, enabling efficient chip-package-system co-design and robustness and efficiency at every step of the design cycle while significantly reducing time to market. Physware’s accelerated technology delivers unprecedented capacity, handling in 3DIC, package and system simulations.
"Today's CEO announcement is a strong endorsement of Physware's business and our strategic vision," said Bala Vishwanath, President of Physware. "Physware will greatly benefit from Raul's experience in driving value creation for our customers. His industry experience is an ideal complement to our current management team to continue to deliver on Physware’s business plan."
About Physware
Physware provides high-speed and high-capacity 3D electromagnetic signal integrity, power integrity and EMI analysis field solutions for the microelectronics industry. Physware’s accelerated technology delivers unprecedented capacity handling, significantly faster speed than current methodologies, and the ability to span the entire design cycle while maintaining concurrent, uncompromising Maxwell accuracy.
Physware is a venture-backed, privately-held company led by an experienced management team. The technology is based on multiple industry publications and patented methodologies. For additional information, please visit www.physware.com.
Related News
- EdgeQ Adds Former Qualcomm CEO Paul Jacobs & CTO Matt Grob as Advisors to Disrupt the Current Closed RAN Ecosystem with RISC-V based Highly Programmable 5G and AI Platform
- Cadence Design Systems Names Michael J. Fister, Former Top Intel Executive, as President and CEO
- ARC names former Virata president its CEO
- Controversial former Arm China CEO founds RISC-V chip startup
- Synopsys Announces Sassine Ghazi to Assume President and CEO Role Jan. 1, 2024
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |