JEDEC Announces Publication of Universal Flash Storage (UFS) Standard
Offers Promise of Ultra-Fast Performance and Lower Power Consumption for Consumer Electronics Devices
ARLINGTON, Va., USA – FEBRUARY 24, 2011 –JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of its next-generation storage system standard, Universal Flash Storage (UFS). UFS is designed to be the most advanced specification for both embedded and removable flash memory-based storage in mobile devices such as smart phones and tablet computers. The UFS standard represents an evolutionary progression of JEDEC standards in this field, and has been specifically tailored for mobile applications and computing systems requiring high performance and low power consumption. The initial data throughput for UFS will be 300 megabytes per second (MB/s), and the standard also supports command queuing features to raise random read/write speeds. JESD220 Universal Flash Storage may be downloaded free of charge from the JEDEC website http://www.jedec.org/standards-documents/results/jesd220.
Gartner forecasts a 117% increase in mobile application downloads in 2011 vs 2010. This explosion of data-intensive applications for mobile devices is driving a need for enhanced storage solutions. UFS builds on the success of the popular JEDEC e•MMC standard and adopts and enhances mobile features from e•MMC in order to manage security, performance and power consumption to a high performance parallel architecture, offering mobile device makers a long term roadmap of standardized mobile flash devices that will meet their system requirements.
To achieve the highest performance and most power efficient data transport, UFS uses the leading industry interface standards to form its Interconnect Layer: MIPI® Alliance’s M-PHY and UniPro specifications. UniPro is a comprehensive specification meant to act as a universal chip-to-chip protocol, providing a common tunnel for other protocols. The M-PHY interface is designed as the primary physical interface (PHY layer) for the UniPro specification, and is a high speed serial interface targeting up to 2.9 gigabits per second (Gbps) per lane with up-scalability to 5.8Gbps per lane.
MIPI’s M-PHY and UniPro specifications are optimized for mobile applications, and are designed from the ground up for efficient power management in mobile devices, including enabling efficient transitions between the active and power save modes. Combined with a low active power level and a near-zero idle power level, UFS offers the promise for significant reductions in device power consumption.
The UFS standard adopts the well-known SCSI Architecture Model and command protocols supporting multiple commands with command queuing features and enabling a multi-thread programming paradigm. This differs from conventional flash-based memory cards and embedded flash solutions which process one command at a time, limiting random read/write access performance. In addition, a forthcoming complementary UFS Host Controller Interface (HCI) specification will allow system designers greater flexibility by simplifying the involvement of the host processor in the operation of the flash storage subsystem. The UFS HCI specification and the adoption of SCSI will provide a well-known software programming model and enable wider market adoption.
“The publication of UFS is an important milestone for JEDEC and the Industry, and represents countless hours of collaboration between memory manufacturers and principal consumer device and mobile OEMs,” said Mian Quddus, Chairman of the JEDEC Board of Directors and the JC-64 Committee for Flash Memory Modules. He added, “Since UFS provides for both embedded and removable card formats the interface is the same for both, which simplifies controller design – an attractive feature for device designers.”
Joel Huloux, Chairman of the MIPI Alliance Board of Directors, said: “MIPI is pleased to have collaborated with JEDEC on the inclusion of M-PHY and UniPro specifications as the interconnect layer for UFS. Together, these standards represent a revolutionary advancement for future mobile device performance.”
In addition to UFS development work within JEDEC, some major participants have founded a new organization, the Universal Flash Storage Association (UFSA), to develop an ecosystem and support environment for UFS devices and host applications.
Additional Resources
Industry Quotes in Support of UFS
About JEDEC
JEDEC is the leading developer of standards for the microelectronics industry. Over 3,000 participants, appointed by nearly 300 companies, work together in 50 JEDEC committees to meet the needs of every segment of the industry, manufacturers and consumers alike. The publications and standards that they generate are accepted throughout the world. All JEDEC standards are available online, at no charge. For more information, visit www.jedec.org.
|
Related News
- JEDEC Updates Universal Flash Storage (UFS) and Supporting Memory Interface Standard
- JEDEC Advances Universal Flash Storage (UFS) Removable Card Standard 3.0
- JEDEC Publishes Update to Universal Flash Storage (UFS) Standard
- JEDEC Publishes Universal Flash Storage (UFS) Removable Card Standard
- JEDEC Publishes Universal Flash Storage (UFS) Standard Version 2.0
Breaking News
- HPC customer engages Sondrel for high end chip design
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- TSMC drives A16, 3D process technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
E-mail This Article | Printer-Friendly Page |