Yokogawa Achieves 5X Faster Programmable Logic Controller Performance With Synopsys' Processor Designer
Processor Designer Tool Automates High Performance Custom Processor Development
MOUNTAIN VIEW, Calif., March 7, 2011 -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Yokogawa Electric Corporation used Synopsys Processor Designer to achieve ultrafast ladder program processing performance for their latest FA-M3V programmable logic controller (PLC). Yokogawa also saved significant development and verification effort with Processor Designer since the tool automatically generates software development tools such as C-compiler, assembler/linker, debugger and the instruction set simulator (ISS) needed for early software development prior to processor availability.
Highlights:
- As part of Synopsys' System-Level Design portfolio, Processor Designer automates the design of custom processors giving IP block designers an easy-to-use, high performance alternative to creating fixed processing hardware or application-specific process
- Processor Designer's profiling feature enabled Yokogawa to explore and optimize their processor to achieve ladder program processing performance that is 5X faster than previous versions.
- Using Processor Designer, Yokogawa saved significant development and verification time by automatically generating software development tools.
- Yokogawa started software design months before they completed processor development because Processor Designer automatically produced the required instruction set simulator.
"Our new PLC FA-M3V has achieved the fastest performance we've ever seen with our latest 'Vitesse Engine' core customized for ladder language program processing," said Hirofumi Okamoto, group leader of the PLC Development Division, Yokogawa Electric Corporation. "With Processor Designer, we were able to develop this ultra-high performance processor using significantly less time and effort than we originally planned."
Yokogawa achieved their improvements in performance and time savings by leveraging Processor Designer's profiling capability to explore and optimize the processor's architecture. These optimizations enabled Yokogawa to meet their target ladder program processing performance goal of 3.75nSec/instruction – 5X faster than previous versions. By optimizing the LISA language input specification and hence the resulting RTL code, the design team also reduced power, gate count and total system development time en route to a successful tape-out.
Processor Designer dramatically accelerates the design of both application-specific processors and configurable accelerators through automated software development tools, RTL and ISS generation from a single, high-level specification. These application-specific processors and configurable accelerators are increasingly essential to support the convergence of multiple functionalities all on a single system-on-chip (SoC). Processor Designer is used to develop a wide range of processor architectures, including architectures with DSP and RISC-specific features as well as single instruction multiple data (SIMD) and very long instruction word (VLIW) processors.
"Customers like Yokogawa are finding they can save significant development effort and achieve better quality of results by automating the application-specific instruction-set processor (ASIP) design process," said John Koeter, vice president of marketing for IP and systems at Synopsys. "With Processor Designer, companies developing ASIP or fixed processing hardware in-house gain broad architectural flexibility to deal with evolving requirements without compromising performance, power or area."
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
|
Synopsys, Inc. Hot Verification IP
Related News
- Renesas Electronics Achieves 4X Faster Performance with Synopsys' HAPS FPGA-Based Prototyping Solution
- Andes Technology's N25F RISC-V Processor Enables Superior Performance And Low Power For Phison's X1 Enterprise SSD Controller
- Tenstorrent Achieves First-Pass Silicon Success for High-Performance AI Processor SoC Using Synopsys' Broad DesignWare IP Portfolio
- Synopsys' New Embedded Vision Processor IP Delivers Industry-Leading 35 TOPS Performance for Artificial Intelligence SoCs
- Synopsys' ASIP Designer Tools Enables RIKEN to Successfully Develop Application-Specific Instruction-Set Processor in Less Than Six Months
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |