DOLPHIN Integration complete their offering with high added value trainings
Grenoble, France, March 18, 2011 - Facing the pressure of delivery schedules to provide right-on-first-pass Silicon IPs and Custom Systems-on-Chip (SoC) themselves, Dolphin Integration have developed techniques based on behavioral modeling to speed-up simulation and on detectors to reduce verification time and increase hierarchical verification coverage.
Now that these methodologies have proven their added-value, Dolphin is spreading these techniques externally and making them accessible to designers through training programs as follows:
- HDL-AMS Modeling trainings not only teach the language constructs of either Verilog-AMS or VHDL-AMS, but also techniques to create and validate behavioral models. By attending one of these trainings, designers will learn how to perform bottom-up modeling through structural assembly of behavioral models for multi-level simulations.
- Analog Detectors training is based on the "EMBLEM Detectors library" and teaches how to use an existing detector, how to assemble custom detectors and how to implement a network of detectors for automating on-line verification of analog designs. Detectors from EMBLEM Detectors can be used in simulation to reveal expected events, undesirable events or bugs in analog or mixed circuits, with respect to specifications which would otherwise be checked only at latest stages.
All trainings are built on practical exercises which will be performed with SLED, the hierarchical schematic editor, and SMASH, the multi-level simulator.
Training sessions are organized regularly around Europe, America and Asia. The next session is scheduled beginning of April in Germany for the "VHDL-AMS modeling training". Registrations are almost over, fill in this form to be able to attend this session.
For more information on the training programs and on the calendar of the next sessions, please contact Nathalie Dufayard at solutions@dolphin-integration.com.
About Dolphin Integration
Dolphin Integration is up to their charter as the most adaptive and lasting creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation as well as independence and partnerships with Foundries. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components. The strategy is to follow product launches with evolutions addressing future needs, emphasizing resilience to noise and drastic reductions of power-consumption at SoC level, thanks to their own EDA solutions enabling Integration Hardware Modeling (IHM) and Application Hardware Modeling (AHM) as well as early Power and Noise assessment, plus engineering assistance for Risk Control. For more information about Dolphin, visit: www.dolphin.fr/eda
|
Dolphin Design Hot IP
Related News
- Disruption in library offering for the 90 nm LP process with Dolphin Integration's new generation of High Density Standard Cells
- A New Offering of High-Resolution Audio DACs for Resident Consumer Applications by Dolphin Integration
- C-SKY Microsystems selects Dolphin Integration's energy management offering for smart voice-interacted devices
- Dolphin Integration reveals its unique Regulator offering for IoT markets at 55 nm
- Dolphin Integration reveal high quality and common-mode noise-resilient audio CODEC targeting automotive infotainment application
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |