BOPS Proves performance/power leadership with Multi-Mode (802.11a & 802.11b) Wireless LAN Solution in silicon
BOPS Proves performance/power leadership with Multi-Mode (802.11a & 802.11b) Wireless LAN Solution in silicon
BOPS new mobile wireless processor Leverages BOPS® WirelessRayTM Core to perform 802.11a and 802.11b PHY processing in software while consuming only 300mW
Mountain View, Calif., November 5, 2001 - BOPS, Inc., a leading provider of programmable broadband DSP cores, today announced its Mobile Wireless Processor (MWP) created in TSMC's 0.13 micron 1.2v process. The evaluation chip builds upon BOPS power/performance leadership. It easily handles PHY processing for 802.11a, 802.11b, and HiperLAN/2 PHY processing with no compromise in power compared to fixed function alternatives.
Jack Quinn, president, Micrologic Research, said: "With the wireless LAN industry about to splinter into several standards which will only be partially compatible with each other, wireless LAN chips will have to be programmable. BOPS® MWP and licensable WirelessRayTM DSP are excellent examples of products that address the need for programmable Wireless LAN devices with no compromise in cost or power."
Micrologic Research estimates that 25 million wireless LAN nodes will ship worldwide in 2005.
Central to the MWP evaluation chip is BOPS new low-power WirelessRay core, which is the first DSP core to compete head-on with single-mode wireless LAN fixed-function designs.
"This changes everything," explained Ivan Greenberg, vice president, platform marketing. "In the past, fixed function ASICs were a no-brainer when developing wireless LAN baseband SOCs. With a die footprint of 6mm2 and power consumption of 70mW, WirelessRay is the first DSP to deliver multi-mode PHY functionality at cost parity with fixed function alternatives. Device manufactures can finally have the best of three worlds - flexibility of DSP, low cost/area ratio of fixed function and high performance/power ratio of fixed function".
WirelessRay is a specific implementation of BOPS ManArray® multi-parallel architecture optimized for portable wireless LAN applications. Its Instruction Set Architecture (ISA) has been extended to provide rich support for complex data type, acceleration of complex FFT/IFFT, flexible support for bit insertion/extraction, and smooth flow of byte wide data types. Owing to the wide architecture and extensive parallelism of the WirelessRay core, it is able to perform PHY layer processing for 802.11a, 802.11b, and HiperLAN/2.
Additionally, BOPS HaloTM compiler, included in BOPS Software Development Kit (SDK) and bundled with the WirelessRay product, enables fast time-to-market of rock-solid multi-mode PHY software. (Halo, recently benchmarked by EEMBC -- www.eembc.org/benchmark -- set an industry record for optimized C performance in EEMBC's telecom benchmark suite.)
The BOPS MWP was designed using industry-standard, low-power synthesis tools from Synopsys with custom-designed memories and register files. In addition to the WirelessRay DSP core, the chip incorporates110kB of on-chip RAM, PCI I/F, SDRAM I/F, and SysAD bus, and delivers 6000 MIPS of performance while consuming 300mW of power. The evaluation chip is available for licensing today and will be incorporated into BOPS Wireless LAN development platform, which will be available Q1 2002.
BOPS customers can work with BOPS best-of-breed wireless LAN alliance partners to get shrink-wrapped multi-mode baseband SOC including 802.11a software, 802.11b software, physical design, and all hardware IP blocks associated with baseband processing. Customers who want more control can also take delivery of the WirelessRay core in Register Transfer Language (RTL) format. WirelessRay and MWP product briefs are available at http://www.bops.com.
BOPS, Inc. offers flexible licensing options including multi-use, per-use and single-use licenses.
About BOPS
Based in Mountain View, Calif., BOPS, Inc. licenses and integrates scalable broadband DSP cores used in communications, mobile multimedia and wireless SOCs. BOPS offers a complete SOC prototyping environment for accelerated time to market, reduced risk, and ease of integration with ARM and MIPS. BOPS®-based SOCs are supported by an extensive alliance of hardware, software, and design partners. For more information, please visit http://www.bops.com.
# # #
Note to editors: BOPS is a registered trademark and ManArray is a trademark of BOPS, Inc. All other brands or product names are the property of their respective holders.
Related News
- Ittiam Systems Launches 802.11b Wireless LAN IP - High Performance, Proven and Ready for SOC Integration
- Conexant Launches World's First 802.11G and 802.11A/G Wireless LAN Solutions with Integrated USB 2.0 Interface
- Wipro Sub-licenses Ittiam's 802.11b Wireless LAN Baseband Technology
- Atmel Announces a Single-Chip Dual Ethernet to 802.11b Wireless LAN Access Point/Router
- Philips acquires Systemonic, a technology leader in 802.11a/b and g wireless lan semiconductor solutions
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |