OCP-IP Highlights Successful Implementation of Advanced OCP Features in Leading-Edge Designs
BEAVERTON, Ore. -- April 12, 2011 -- OCP-IP announces the successful adoption and implementation of sophisticated OCP interface features, including 2-dimensional (2-D) burst and power management, by innovative designs like the OMAP™ 4 platform from Texas Instruments Incorporated (TI).
Leveraging OCP in integrated circuit (IC) development allows designers to build their cores independent of specific bus protocols, and of any particular design implementation. This ensures easier reuse of OCP-compliant cores across multiple system-on-chip (SoC) designs. OCP eliminates the need to repeatedly modify the core itself and preserves fully reusable verification and test benches by defining all the core’s natural interface capabilities to be presented in an unchanging, universally understood manner.
For the most sophisticated embedded multimedia and graphics processors demanding maximum memory system performance at minimum power consumption, the OCP protocol offers features such as 2-D bursts and safe core connect/disconnect for power management. The advanced 2-D burst feature ensures the highest memory system performance for advance graphics implementations, while the power management feature defines a new connection protocol that allows the power management hardware to disconnect the OCP interface without losing any transaction, so the manager may then independently shut off power. Detailed technical articles discussing the use of 2-D bursting and power management can be found by clicking on the links provided.
The first major SoC products using these sophisticated protocol features of the OCP protocol are now appearing on the market.
“TI’s OMAP 4 platform calls on the OCP’s 2-D burst feature to help improve DRAM efficiency for video and still image processing. Other OCP features such as core disconnect, out-of-order transaction completion, and single-request-multiple-data also benefit the OMAP 4 technology,” said James Aldis, MPU and DRAM Architecture Leader, Wireless Business Unit, TI. “These OCP components play a role in achieving the high performance and low power capabilities that make the OMAP 4 applications processor the industry’s most advanced mobile multimedia platform."
The OMAP 4 platform is the fourth generation of TI’s OMAP family to utilize the OCP interface. The OMAP4430 processor contains more than 100 OCP-compliant building blocks.
TI is a Governing Steering Committee member of OCP-IP.
“OCP-IP not only provides the OCP specification, but also a complete infrastructure that allows our members to quickly and easily implement OCP into world-class leading edge designs like the OMAP platform,” said Ian Mackintosh, president OCP-IP. “Standards are only proven through real-world implementations, and our member companies have adopted OCP and applied it in production SoC designs shipping approximately one billion units annually.”
To view some of the many application areas where OCP is used, please see the presentation available at: http://www.ocpip.org/ocp_inside.php.
For the latest information on OCP-IP please see our newsletter at: http://www.ocpip.org/newsletters.php.
About OCP-IP
Formed in 2001, OCP-IP is a non-profit corporation promoting, supporting and delivering the only openly licensed, core-centric protocol comprehensively fulfilling integration requirements of heterogeneous multicore systems. The Open Core Protocol (OCP) facilitates IP core reusability and reduces design time, risk, and manufacturing costs for all SoC and electronic designs by providing a comprehensive supporting infrastructure. For additional background and membership information, visit www.OCPIP.org.
|
Related News
- OCP-IP Highlights Texas Instruments Use of OCP in Leading-edge OMAP 2 Architecture
- OCP-IP Highlights Toshiba's Use Of OCP In Leading-Edge Super Companion Chip
- Socionext to Showcase Leading-Edge Technologies at CES 2024, Featuring Custom SoC Solutions, Low Power Sensors, Smart Display Controller, and Advanced Image Processor
- Tower Semiconductor Expands its Leading-Edge Power Management Platforms Supporting Higher Power and Higher Voltage ICs
- TI power management front-end chip increases battery run-time in ARM Cortex A15-based designs
Breaking News
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- Sondrel announces CEO transition to lead next phase of growth
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
Most Popular
- Arm's power play will backfire
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
E-mail This Article | Printer-Friendly Page |