Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
NAND Flash Memory Controller IP Core from CAST now Faster and Easier to Integrate
May 11, 2011, Woodcliff Lake, NJ — A recent new version of the NAND Flash Controller Core from semiconductor intellectual property (IP) provider CAST, Inc. now helps designers work with the latest advanced memory devices available. It does this by using faster error correction code, and by including better features for simplifying integration and improving performance in demanding System-on-Chip (SoC) implementations. (See http://bit.ly/cast-nandflash.)
“This fifth-generation FLASH controller continues CAST’s commitment to making SoC design with the latest technologies as quick and risk-free as possible,” said Meredith Lucky, CAST’s vice president of sales. “The controller helps designers use the most advanced memory devices available today; improves data throughput and power consumption; and has configurable features that make it ideal for SSDs, consumer devices, and other specific, memory-intensive applications.”
The controller core works with all memory devices that comply with the ONFI 2.2 standard, while also supporting the advanced performance features of some specific devices.
The core’s improved error correction code (ECC) ensures high-bandwidth transmission despite data errors by performing at-speed error detection and correction on up to 64 bits, using a significantly improved BCH (Bose, Ray-Chaudhuri and Hocquenghem) implementation.
The controller now imposes less demand on a host system’s processor by handling complex functions in hardware, including: integrated AES-256 data encryption, multi-page transfer, and automatic remapping of corrupted memory blocks. It also has a comprehensive command set for easy memory access.
The controller reduces SoC integration challenges through several new or improved features. Interfaces to standard system buses now include AMBA® AHB and AXI, Avalon, CoreConnect PLB, and OCP. Flexible integrated Direct Memory Access (DMA) options now range from a simple Slave DMA with programmable FIFO thresholds to an advanced scatter-gather Master DMA. A boot-from-flash feature now loads firmware to on-chip memory automatically during system booting.
The core is delivered with a refined set of production-proven software drivers, and a soft-PHY that designers can use to target any implementation technology.
Sourced from the memory experts at long-time CAST partner Evatronix S.A., the controller is available in configurations to suit different applications. These include a small version that only supports asynchronous mode—ideal for long-term or boot code storage—and a full-featured, high-speed version capable of managing up to 200 MT/s for applications needing the full bandwidth of the latest memory devices.
The NAND Flash Controller improvements are part of CAST’s continuing commitment to provide the best IP available anywhere. Future enhancements include support for the Toggle Mode DDR devices available from Toshiba and Samsung; Micron’s ClearNAND™ devices; and the ONFi3.0 standard. Learn more about CAST and the NAND Flash Controller core by calling +1 201.391.8300 or visiting http://www.cast-inc.com.
|
CAST, Inc. Hot IP
Related News
- CAST Improves SDIO Host and NAND Flash Memory Controller Cores
- CAST Releases Improved IP Core for Controlling Large NAND-Flash SSD Memories
- CAST NAND Flash Controller Supports Latest High-Speed Memories and is Ready for ONFI 3
- Evatronix Adds the SDLL NAND Flash PHY IP to Its Memory Controller IP Portfolio
- Evatronix Boosts the Performance of Its ONFi NAND Flash Memory Controller IP
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |