NextOp Reduces Engineering Development Time with BugScope Assertion Synthesis for Assertion-Based Verification
Update: Atrenta Accelerates Growth in Front End Design with Acquisition of NextOp Software, Inc. (June 20, 2012)
SANTA CLARA, Calif. May 16, 2011 – NextOp Software, Inc. today announced that its BugScope Assertion Synthesis for Assertion-Based Verification reduces engineering time and engineering effort needed to create high quality functional coverage properties and assertions. Partnering with Altera Corporation (NASDAQ: ALTR), the technology leader has signed a multi-year, multi-license agreement to expand its deployment of NextOp’s BugScope Assertion Synthesis product. BugScope’s assertion and coverage properties help Altera engineers find bugs earlier in the design process before their end-to-end checkers and coverage monitors are written.
NextOp’s product helps improve functional coverage by automatically identifying all relevant problem signals without user guidance. BugScope’s automation and Verilog-like language make it easy for designers to understand the assertion and functional coverage properties generated, even with minimal prior exposure to assertions.
“NextOp’s BugScope allows us to find bugs during property classification and simulations, shortening our verification process and saving us debug time,” said Chong H. Lee, director in IC design at Altera. “BugScope's innovative tool is now a part of our process for our IP design and verification flow.”
“We are pleased that a technology leader such as Altera has successfully deployed our BugScope's assertion synthesis product,” said Yunshan Zhu, President and CEO of NextOp Software. “We look forward to a continued close relationship with Altera as they further expand their BugScope adoption for their assertion-based verification methodology.”
About NextOp Software
NextOp Software, Inc. is focused on delivering assertion-based verification solutions that allow design and verification teams to uncover bugs, expose functional coverage holes, and increase verification observability. NextOp’s BugScope assertion synthesis is the first product to automatically generate whitebox assertions and functional coverage properties in SVA, PSL and Verilog formats. BugScope’s properties are used to drive progressive, targeted verification via robust, executable design specifications for existing simulation, formal and emulation flows. The company is headquartered at 2900 Gordon Avenue, Suite 100, Santa Clara, CA 95051. For more information, visit www.nextopsoftware.com or call +1 408-830-9885.
|
Related News
- NextOp Announces BugScope Assertion Synthesis for Progressive, Targeted Verification
- NextOp Licenses BugScope Assertion Synthesis to Graphics Leader NVIDIA
- NextOp Software Debuts with Focus on Assertion-Based Verification
- Siemens IT Solutions and Services Adopts Cadence's Assertion-based VIP to Speed Development
- Assertain success boosts investors' interest in TransEDA Assertion-Based Verification strategy
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |