TowerJazz Announces Availability of Wireless Antenna Switch SOI Process Technology
SOI technology and IP available to speed market introduction of silicon-based handset antenna switch at 40% the cost of today’s GaAs-based solutions
MIGDAL HA’EMEK, Israel, and NEWPORT BEACH -- Calif., May 31, 2011 -- TowerJazz, the global specialty foundry leader, today announced availability of its wireless antenna switch SOI process technology applicable to multiple wireless standards. SOI based solutions cost substantially less than legacy solutions based on GaAs pHEMPT or silicon-on-sapphire (SOS) technologies. The TowerJazz SOI technology is unique relative to other SOI processes in that it maintains full compatibility with its bulk CMOS process enabling integration of control functions, low-noise amplifiers and power amplifiers on a single chip. High-end smart-phones can benefit most from integration while lower-end phones can benefit simply from the lower cost of SOI making the technology relevant for most of the 1.4 billion handset units sold each year.
In addition to the process, design IP is available to kick-start the design effort. An example is a switch IP block optimized to achieve excellent channel isolation of better than -40 dBm, insertion loss of 0.47 dB in low-band and 0.58 dB in high-band, low harmonics of better than 75 dBc at cellular power levels, and intermodulation distortion measured as low as -117 dBm.
The TowerJazz SOI process combines a 6 or 4 metal layer CMOS process with high resistivity SOI substrates. It is a 0.18μm technology with dual gate 1.8V and 3.3V or 5V MOSFETs and a 5V RFLDMOS with Ft of 19 GHz and breakdown of 20V. The 3.3V and 5V FETs facilitate the integration of HVCMOS blocks while the 1.8V FETs are the integration of logic functions. The LDMOS device provides for reliable, high performance RF power. The passive components include silicided and unsilicided poly resistors, 2 fF/μm² and stacked 4 fF/μm² metal-insulatormetal capacitors, scalable inductors and discrete size baluns and transformers. While using an SOI starting material, this unique technology offers “bulk-like” behavior of the active MOSFETs, free of floating body effects for ease of IP integration. Isolation between device wells and of field areas below sensitive passive components and metal routing is provided by an oxide filled trench to the buried oxide.
“TowerJazz’s SOI technology is providing our customers a unique set of features targeting the cellular switch market at a lower cost than the incumbent technologies of GaAs pHEMT and silicon-on-sapphire. Unlike other SOI technologies, our process allows the seamless integration of existing bulk IP such as power control, low-noise amplifiers and even power amplifiers,” said Dr. Marco Racanelli, Senior Vice President and General Manager, RF and High Performance Analog Business Group.
TowerJazz will be exhibiting (booth #715 on Agilent Avenue) at the IEEE Microwave Theory and Techniques Society (MTT-S) Conference on June 7-9, 2011 at the Baltimore Convention Center in Baltimore, Maryland where detailed information on its wireless antenna SOI switch process technology will be available.
About TowerJazz
Tower Semiconductor Ltd. (NASDAQ: TSEM, TASE: TSEM), the global specialty foundry leader and its fully owned U.S. subsidiary Jazz Semiconductor, operate collectively under the brand name TowerJazz, manufacturing integrated circuits with geometries ranging from 1.0 to 0.13- micron. TowerJazz provides industry leading design enablement tools to allow complex designs to be achieved quickly and more accurately and offers a broad range of customizable process technologies including SiGe, BiCMOS, Mixed-Signal and RFCMOS, CMOS Image Sensor, Power Management (BCD), and Non-Volatile Memory (NVM) as well as MEMS capabilities. To provide world-class customer service, TowerJazz maintains two manufacturing facilities in Israel and one in the U.S. with additional capacity available in China through manufacturing partnerships. For more information, please visit www.towerjazz.com.
|
Related News
- Synopsys Announces Availability of DesignWare Non-Volatile Memory IP for TowerJazz 180-nm Process Technology
- Certus Semiconductor releases I/O library in TowerJazz's 65nm process
- Mixel Announces Immediate Availability of MIPI C-PHY/D-PHY Combo IP on STMicroelectronics 40LP Process Technology
- CFX announces commercial availability of low cost automotive grade SonoS based charge trapping EFlash/MTP technology on 90nm BCD process
- SkyWater Announces Availability of Cadence Open-Source PDK and Reference Design for SkyWater's 130 nm Process
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |