Konica Minolta Accelerates Hardware Debugging with EVE's ZEMI-3 Transaction-Level Modeling Methodology
Reports One Week to Set Up Transactors, 200X Acceleration
SAN JOSE, CALIF. –– June 30, 2011 –– Konica Minolta Technology Center, Inc., of Tokyo, Japan today announced that it accelerated its hardware debugging process through the use of EVE’s ZeBu hardware-assisted verification platform and ZEMI-3 transaction-level modeling methodology.
Over the past year, Konica Minolta has deployed ZeBu to accelerate the simulation of its high-speed, high-performance large-scale integrated circuits (LSIs) used in image processing. Konica Minolta designers adopted EVE’s ZEMI-3 transaction-level modeling methodology for transaction-level verification, drastically reducing the time it spent to create custom transactors.
“It took our designers one week to set up ZeBu and ZEMI-3 and run our test suite with results exceeding 200 times acceleration over RTL simulation,” remarks Takashi Kawabe, Assistant Manager of Architecture R&D Division, System Solution Technology R&D Laboratories at Konica Minolta Technology Center, Inc.
In that case, the test suite reported by Konica-Minolta consisted of 160,000 test sets that executed at an average of 8.5 seconds each in the emulator. In the hardware description language (HDL) simulator, each test simulated in 1,700 seconds. The speed up factor of more than 200 times exceeded Konica-Minolta expectations.
Konica-Minolta also remarked about the excellent support from EVE’s team in Japan.
About EVE
EVE is the worldwide leader in hardware/software co-verification solutions, offering fast transaction-based co-emulation and in-circuit emulation, with installations at five of the top six semiconductor companies. EVE products shorten the overall verification cycle of complex integrated circuits and electronic systems designs. Its products can be integrated with transaction-level ESL tools and software debuggers, target hardware systems, as well as Verilog, SystemVerilog and VHDL simulators. EVE is a member of ARM, Mentor Graphics, Real Intent, Springsoft and Synopsys Partner programs.
|
Related News
- EVE's ZEMI-3 Methodology Used by Fujitsu Microelectronics Solutions to Implement Integrated Algorithm-to-Emulation Flow
- EVE's ZeBu Hardware-Assisted Verification Platform Used by Konica Minolta to Implement SystemVerilog Assertions
- Sunplus Technology Picks Cadence Transaction-Level Modeling Flow for Next-Gen Multimedia ICs
- Konica Minolta Adopts EVE's ZeBu Emulation Platform to Dramatically Accelerate Validation of Image Processing LSI Designs
- Virtutech Announces Simics Full-System Checkpointing for SystemC Based Transaction-Level Modeling
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |