Xilinx Space-Grade Virtex-5QV FPGA in Production with Mega-Rad Capability
Replace ASICs and One-Time-Programmable Solutions with Space-Grade, High-Density, Rad-Hard Reconfigurable FPGAs
SAN JOSE, Calif., July 21, 2011 -- Xilinx, Inc. (NASDAQ: XLNX) today announced that its radiation-hardened-by-design space-grade Virtex®-5QV FPGA is available in production with greater than 1Mrad(Si) Total Ionizing Dose (TID) capabilities for supporting the broadest range of space borne missions from low-earth orbit and beyond. The Virtex-5QV device is the first of its kind reprogrammable Single-Event-Upset (SEU) hardened FPGA specifically designed to withstand the harshest radiation environments so that design teams can shorten time-to-launch from years to months by using an off-the-shelf solution for building complex, high-performance space systems that can be reprogrammed and updated even after launch.
"NASA has a history of firsts when it comes to space exploration. We are excited that NASA's Earth Science Technology Office, in partnership with the ELaNa-3 CubeSat Launch Program, is sponsoring the Jet Propulsion Laboratory and the University of Michigan to be the first to fly a production Virtex-5QV FPGA as the time-to-launch has been significantly reduced by utilizing an off-the-shelf, reprogrammable, rad-hard device," said Harvey Steele Jr., Xilinx Vice President, Segment Marketing and Business Operations. "Passing the Mega-rad barrier in TID surpassed even our own expectations and leaves the door wide open for Virtex-5QV devices to provide reprogrammability and high-performance for a broad range of missions in defense, commercial and space exploration."
High Performance FPGAs for the Demanding Requirements of Space
The rad-hard features inherent in Virtex-5QV devices are backed by the highest levels of in-beam testing by the Xilinx Radiation Test Consortium (XRTC) and equivalent to millions of device years in space radiation environments. This means Virtex-5QV FPGAs provide exceptional protection against SEU, Total Immunity to Single-Event Latchup (SEL), high tolerance to TID, as well as data path protection from Single-Event Transients (SET). For example, the Virtex-5QV FPGA configuration memory provides nearly 1,000 times the SEU hardness of the standard cell latches in the commercial device, while configuration control logic and the JTAG controller have been hardened with embedded triple module redundancy.
Typical systems until now have either relied on one-time-programmable (OTP) solutions with reduced performance or long lead time, high non-recurring engineering (NRE) ASICs. Systems such as satellite communications networks, increased security for powerful defensive systems and new frontiers in space exploration will be within reach as a direct result of the unique combination of features that the Virtex-5QV FPGA provides.
What Customers are Saying
"We have anticipated the need for the Virtex-5QV FPGA for next generation space systems in defense applications," said Craig Purcell, Advanced Global Communications Program Director at Lockheed Martin Space Systems. "To improve affordability and flexibility of our space systems, we are currently engaged in substantive efforts to insert space qualified FPGA reconfigurable technology into future missions."
"Having successfully flown the previous generation Virtex-4QV FPGA in the critical docking systems for the Orion program, weare evaluating the rad-hard Virtex-5QV device for our next designs utilizing the programmability and integration possibilities, which reduce mission risk significantly," said Rick Higgins, Manager, Ball Aerospace Electronics Product Center.
About Virtex-5QV Devices
Virtex-5QV FPGAs are built on the second-generation ASMBL(TM) column-based architecture of the proven, industry-leading Virtex-5 family with support in Xilinx's ISE® Design Suite. Virtex-5QV FPGAs integrate many of the same hard-IP system-level blocks, such as flexible 36-Kbit/18-Kbit block RAM/FIFOs, second generation 25x18 DSP slices, power-optimized high-speed serial transceiver blocks for enhanced serial connectivity, and PCI Express® compliant integrated Endpoint blocks. The Virtex-5QV device offers 130,000 logic cells, 320 DSP Slices supporting fixed and floating point operations, and 836 user I/Os programmable to more than 30 different standards for applications and ease of interfacing to a wide variety of system components. The Virtex-5QV device also provides the industry's first integrated high-speed connectivity solution for space with 18 channels of 3Gbps multi-gigabit serial transceivers for chip-to-chip, board-to-board and box-to-box communication. The radiation-hardened version of the commercial Xilinx Virtex-5 FPGA was developed under sponsorship by AFRL's Space Vehicles Directorate.
About Xilinx Aerospace & Defense
Xilinx has provided uninterrupted support to the A&D industry since 1989 with comprehensive solutions that include: commercial-grade, defense-grade and space-grade FPGAs; a complete ecosystem of IP from image processing to approved security; and advanced capabilities such as Information Assurance and Anti-Tamper. These solutions feature long product lifecycles, high reliability, unique manufacturing flows, specialized design services, and pioneering security solutions for high assurance applications. For more information, visit: http://www.xilinx.com/applications/aerospace-and-defense/index.htm.
About Xilinx
Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit http://www.xilinx.com/.
|
Xilinx, Inc. Hot IP
Related News
- Xilinx "Lifts Off" with Launch of Industry's First 20nm Space-Grade FPGA for Satellite and Space Applications
- Lights, Camera, Action: Xilinx Powers Sony's New-Gen Live Production Video Switcher
- Xilinx Spartan-7 FPGAs Now in Production
- Audi Selects Altera SoC FPGA for Production Vehicles with "Piloted Driving" Capability
- Xilinx and TSMC Reach Volume Production on all 28nm CoWoS-based All Programmable 3D IC Families
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |