EEMBC Publishes Benchmark Scores for Infineon Technologies' Carmel DSP Core And TriCore TC11IB Microcontroller
EL DORADO HILLS, Calif., March 13 /PRNewswire/ -- EEMBC, the Embedded Microprocessor Benchmark Consortium, today announced that it has published EEMBC benchmark scores for Infineon Technologies' (NYSE: IFX; FSE) Carmel DSP Core and TriCore TC11IB microcontroller.
The 170-MHz Carmel DSP, tested against EEMBC's Telecomm benchmark suite, scored 4.8 Telemarks. Infineon used its Infineon IC3 compiler to produce EEMBC out-of-the-box benchmark scores.
"The EEMBC Certification Laboratories (ECL) is pleased to have certified Infineon's Carmel DSP for the EEMBC benchmark scores for Telecomm," said ECL Chairman and CTO Alan R. Weiss. "Infineon takes EEMBC real-world benchmarking seriously, and its C compiler contributes positively to the overall performance of this processor."
Infineon Technologies' Carmel DSP is a 16-bit, fixed-point DSP core targeted at advanced wireless and wired communications applications. Designed for integration in complete system-on-a-chip (SoC) implementations, the Carmel core delivers high performance and efficient DSP MIPS without sacrificing power dissipation and code compactness requirements. The Configurable Long Instruction Word (CLIW) architecture sets the core apart by allowing VLIW performance at costs comparable to traditional, less-flexible DSP architectures.
"The excellent benchmark certification results achieved running 'out-of-the-box' tests on the Carmel DSP core are a testimony to the efficiency of the compiler developed for deployment of Carmel-based system chips," said Alex Bedarida, vice president for DSP cores at Infineon Technologies. "System developers are increasingly moving to C-compiled code in DSP applications in order to optimize code re-usability and time to market. This makes compiler performance a keystone of product evaluations, and we now have well-recognized industry-standard benchmark recognition for Carmel DSP."
A 96-MHz Infineon TC11IB, tested against EEMBC's Automotive/Industrial benchmark suite, scored 33 Automarks. Infineon used Tasking's Tricore V1.4r1 compiler to produce EEMBC out-of-the-box benchmark scores.
"The TC11IB is a general purpose, industrial controller embedding Infineon's TriCore Unified Processor core, which combines RISC and DSP instruction sets in a single, highly efficient architecture," said Walter Croce, director of marketing for 32-bit cores at Infineon Technologies. "The inherent performance advantages of the unified core are well illustrated by the EEMBC benchmarks. By evaluating real-world performance instead of arbitrary parameters, we are able to show the 'best-in-its-class' performance of the microcontroller using the industry's best benchmarking system."
Incorporating advanced communication peripherals and external interfaces, the 32-bit TC11IB microcontroller is designed for robust performance in embedded applications such as Programmable Logic Control, slot CPU in a PC, and industrial communications. Operating at a 96-MHz clock rate and featuring 1.5 MB of embedded DRAM memory, the microcontroller supports sophisticated real-time operating systems and is capable of handling floating point calculations entirely from software libraries.
ECL's Weiss commented, "Infineon is taking positive steps to make sure that people have accurate, certified performance information on their processors. It's important to show customers and prospects that you are committed to benchmarking more than a single processor. At ECL, we accurately recreated Infineon's TriCore TC11IB processor benchmark platform, and we're enthused to have certified Infineon's EEMBC Automotive/Industrial benchmark scores."
Detailed EEMBC benchmark score reports for both the Carmel DSP Core and TriCore TC11IB microcontroller are available now for free at the EEMBC web site, www.eembc.org .
About EEMBC
EEMBC, the Embedded Microprocessor Benchmark Consortium, develops and certifies real-world benchmarks and benchmark scores to help designers select the right embedded processors for their systems. Every processor submitted for EEMBC benchmarking is tested for parameters representing different workloads and capabilities in communications, networking, consumer, office automation, automotive/industrial, embedded Java, and microcontroller-related applications. With members including leading semiconductor, intellectual property, and compiler companies, EEMBC establishes benchmark standards and provides certified benchmarking results through the EEMBC Certification Labs (ECL) in Texas and California.
EEMBC members include: Agere Systems, Altera, ARC, ARM, BOPS, Cadence, ChipWrights, DSP Group, Equator Technologies, Fujitsu Microelectronics, Green Hills Software, Hewlett-Packard, Hitachi America Ltd., Improv Systems, IBM Corporation, Imsys, Infineon Technologies, Intel, LSI Logic, Metaware, Metrowerks, Microchip Technology, MIPS Technologies Inc., Mitsubishi Electric, Motorola, National Semiconductor, Nazomi Communications, NEC, Oki Semiconductor, Panasonic, Parthus, Philips Semiconductors, PMC-Sierra, Precise, Red Hat, SandCraft, STMicroelectronics, Siroyan Ltd., Sun Microsystems, Tensilica, Texas Instruments, Toshiba, TriMedia Technologies, Vulcan Machines, Wind River (DIAB), Xilinx, and Zucotto Wireless.
EEMBC is a registered trademark of the Embedded Microprocessor Benchmark Consortium. All other trademarks appearing herein are the property of their respective owners.
Related News
- EEMBC Announces Benchmark Scores for Infineon's TriCore(R)-Based TC1796 Automotive Microcontroller
- Independent Benchmark Scores Show Freescale's Industry Leading MSC8144 DSP Soars against the Competition
- NEC Electronics America Announces EEMBC Benchmark Scores for 50-MHz, 32-Bit V850E Microcontroller and 266-MHz VR4133 MIPS-Based Microprocessor
- EEMBC Publishes Benchmark Scores for IBM’s PowerPC 440GP Microprocessor
- EEMBC Publishes Benchmark Scores for Toshiba’s TMPR4927 MIPS-Based 64-Bit RISC Processor
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |