Update: Cadence Completes Acquisition of Tensilica (Apr 24, 2013)
Rick Merritt, EETimes
8/19/2011 9:15 AM EDT
PALO ALTO, Calif. – Tensilica described a new integer DSP core for next-generation cellular applications that when made in a 28nm process can compute 100 GMACs/second at less than a Watt. The BBE64 core is a new instruction set architecture based on the companies' current Xtensa LX4 core.
"We are trying to build a world-leading DSP core, arguably the fastest DSP core yet," said Chris Rowen, Tensilica founder and chief technologist in a talk at the Hot Chips event here.
The BBE64 combines SIMD and VLIW concepts and lets designers configure processors for a range of handset and base stations uses. Rowen said the core run at data rates of "a few hundred MHz" could process 2x2 MIMO LTE Advanced signals at 1 Gbit/second across 100 MHz of spectrum.
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