2D Vector Graphics Accelerator / GPU (Graphics Processing Unit)
Synopsys gives equivalency checker a new look
![]() |
Synopsys gives equivalency checker a new look
By Richard Goering, EE Times
March 18, 2002 (12:20 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020318S0028
MOUNTAIN VIEW, Calif. In an effort to make formal equivalency checking more accessible to designers who aren't formal-verification experts, Synopsys Inc. this week will roll out a "flow-based" user interface for its Formality tool. Formality 2002 also promises to make it easier to set up designs for formal verification.
"To be broadly accepted, you have to have full-chip capacity and performance, and that's already been addressed by Formality," said Robert Hoogenstryd, director of marketing for the tool at Synopsys. "The next thing is to make the tool easy to use and adopt by nonformal experts."
Hoogenstryd said Synopsys has redesigned the Formality GUI based on usability studies with customers. The new interface, he said, is based on forms, and it guides a user through the various steps of the equivalency-checking process with menus specific to each step.
New debugging capabilities include cross-probing with source-code links, so that a user can click on a gate or a net and highlight the original source. Formality 2002 has a new color-coded, pattern display window that shows discrepancies between the reference and the implementation design. Also new are automated hierarchical scripts, which help set up the design for hierarchical verification.
To make it easier to read-in designs, Formality 2002 has adopted a "VCS style," using the same sort of switches and commands as Synopsys' VCS simulator, Hoogenstryd said. Also new is an "intelligent black-boxing" facility that makes it easier to designate black boxes, and more accuracy in RTL interpretation by identifying potential simulation vs. synthesis mismatches.
Formality 2002 will be available at the end of the month, starting at $58,800 for one-year subscription licenses.
Related News
- Synopsys Extends Support for ARM AMBA Protocol Verification with New Performance Checker for AMBA 4 AXI4
- Averant Adds RTL and Gate Level Combinational Equivalency Checker
- Analysis gives first look inside Apple's A4 processor
- Mentor Graphics Launches FormalPro Equivalency Checker
- Synopsys Accelerates Chip Design with NVIDIA Grace Blackwell and AI to Speed Electronic Design Automation
Breaking News
- VeriSilicon introduces AcuityPercept: an AI-powered automatic ISP tuning system
- Avant Technology Partners with COSEDA Technologies to Enhance System-Level Software Solutions
- intoPIX Powers Ikegami's New IPX-100 with JPEG XS for Seamless & Low-Latency IP Production
- Tower Semiconductor and Alcyon Photonics Announce Collaboration to Accelerate Integrated Photonics Innovation
- Qualcomm initiates global anti-trust complaint about Arm
Most Popular
- Qualcomm initiates global anti-trust complaint about Arm
- Sarcina Technology launches AI platform to enable cost-effective customizable AI packaging solutions
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Tower Semiconductor and Alcyon Photonics Announce Collaboration to Accelerate Integrated Photonics Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |